high performance computing on graphics processing units: hgpu.org

Acceleration of cryptographic applications on massively parallel computing platforms, such as Graphics Processing Units (GPUs), becomes a real challenge as their decreasing cost and mass production makes practical implementations attractive. We propose a layered trusted architecture integrating random bits generation and parallelized RSA cryptographic computations on such platforms. The GPU-resident, three-tier, MR architecture consists of a RBG, using the GPU as a deep entropy pool; a bignum modular arithmetic library using the Residue Number System; and GPU APIs for RSA key generation, encryption and decryption. Evaluation results of an experimental OpenCL implementation show a 32-40 GB/s throughput of random integers, and encryptions with up to 16,128-bit long exponents on a commercial mid-range GPUs. This suggests an ubiquitous solution for autonomous trusted architectures combining low cost and high throughput.