Meshfree/GFEM in hardware-efficiency prospective

Rong Tian
Institute of Computing Technology, Chinese Academy of Sciences, Kexueyuan Nanlu 6, Haidian, Beijing 100190, China
Interaction and Multiscale Mechanics, Vol. 6, No. 2, 2013


   title={Meshfree/GFEM in hardware-efficiency prospective},

   author={Tian, Rong},



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A fundamental trend of processor architecture evolving towards exaflops is fast increasing floating point performance (so-called "free" flops) accompanied by much slowly increasing memory and network bandwidth. In order to fully enjoy the "free" flops, a numerical algorithm of PDEs should request more flops per byte or increase arithmetic intensity. A meshfree/GFEM approximation can be the class of the algorithm. It is shown in a GFEM without extra dof that the kind of approximation takes advantages of the high performance of manycore GPUs by a high accuracy of approximation; the "expensive" method is found to be reversely hardware-efficient on the emerging architecture of manycore.
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