high performance computing on graphics processing units: hgpu.org

hgpu.org » nVidia Tesla GP100

Workload-aware Automatic Parallelization for Multi-GPU DNN Training

Sungho Shin, Youngmin Jo, Jungwook Choi, Swagath Venkataramani, Vijayalakshmi Srinivasan, Wonyong Sung

View

Tags: Artificial intelligence, Computer science, Deep learning, Neural networks, nVidia, nVidia DGX-1, nVidia GeForce GTX Titan XP, nVidia Tesla GP100

November 11, 2018 by hgpu

hpcbench: A set of benchmarking utilities for biomolecular simulation tools

Engineering Supercomputing Platforms for Biomolecular Applications

HPCTransCompile: An AI Compiler Generated Dataset for High-Performance CUDA Transpilation and LLM Preliminary Exploration

HPCTransCompile: An AI Compiler Generated Dataset for High-Performance CUDA Transpilation and LLM Preliminary Exploration

chemtrain: Training Molecular Dynamics Potentials in JAX

chemtrain-deploy: A parallel and scalable framework for machine learning potentials in million-atom MD simulations

microSYCL: SYCL micro-benchmarks repository

Exploring SYCL as a Portability Layer for High-Performance Computing on CPUs

XaaS containers

Acceleration as a Service (XaaS) Source Containers

CASS: Cuda-Amd aSSembly

CASS: Nvidia to AMD Transpilation with Data, Models, and Benchmark

Cluser of smartphones for edge computing application using TensorFlow

Low-cost edge computing using upcycled smartphones

SYCL Container

Exploring SYCL for batched kernels with memory allocations

Efficient Graph Embedding at Scale: Optimizing CPU-GPU-SSD Integration

Efficient Graph Embedding at Scale: Optimizing CPU-GPU-SSD Integration

Can Large Language Models Predict Parallel Code Performance?

Can Large Language Models Predict Parallel Code Performance?

See all packages

* * *

* * *

HGPU group © 2010-2025 hgpu.org

All rights belong to the respective authors

Login | Sitemap | Feedback | Policy

Contact us: