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RadixBoost: A Hardware Acceleration Structure for Scalable Radix Sort on Graphic Processors

Xingyu Liu, Shikai Li, Kuan Fang, Yufei Ni, Zonghui Li, Yangdong Deng
Institute of Microelectronics, Tsinghua University
2015 IEEE International Symposium on Circuits and Systems (ISCAS’15), 2015

@article{liu2015radixboost,

   title={RadixBoost: A Hardware Acceleration Structure for Scalable Radix Sort on Graphic Processors},

   author={Liu, Xingyu and Shikai Li, Kuan Fang and Ni, Yufei and Li, Zonghui and Deng, Yangdong},

   year={2015}

}

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In this paper, we propose RadixBoost, a hardware acceleration structure for scalable 32-bit integer radix sort on GPU. The whole structure is integrated into a GPU microarchitecture as a special functional unit and can be started by new instructions. Our design enables a significantly faster sorting procedure for general purpose GPU computing. The RadixBoost architecture was validated by an FPGA prototype integrated in FPGA-based GPU microarchitecture simulator, Fastlanes. An ASIC evaluation of RadixBoost was also performed. Our results proved that RadixBoost outperformed its GPU software equivalent by a factor of over 6 with an 1% and 3% increase in area and power respectively in cutting-edge Fermi GPU.
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