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The Accelerator Wall: Limits of Chip Specialization

Adi Fuchs, David Wentzlaff

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Tags: ASIC, Computer science, FPGA

June 2, 2019 by hgpu

BENCHIP: Benchmarking Intelligence Processors

Jin-Hua Tao, Zi-Dong Du, Qi Guo, Hui-Ying Lan, Lei Zhang, Sheng-Yuan Zhou, Cong Liu, Hai-Feng Liu, Shan Tang, Allen Rush, Willian Chen, Shao-Li Liu, Yun-Ji Chen, Tian-Shi Chen

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Tags: ASIC, Benchmarking, Computer science, Deep learning, nVidia, nVidia GeForce GTX 950, nVidia Tegra TX1, Tesla K40

October 24, 2017 by hgpu

Evaluation of GPU-based track-triggering for the CMS detector at CERN’s HL-LHC

Hannes Mohr

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Tags: Algorithms, ASIC, CUDA, FPGA, HEP, nVidia, Physics, Tesla K40, Tesla K80, Thesis

April 20, 2017 by hgpu

Accelerating Binarized Neural Networks: Comparison of FPGA, CPU, GPU, and ASIC

Eriko Nurvitadhi, David Sheffield, Jaewoong Sim, Asit Mishra, Ganesh Venkatesh, Debbie Marr

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Tags: Algorithms, ASIC, Computer science, CUDA, Deep learning, FPGA, Neural networks, nVidia, nVidia GeForce GTX Titan X, nVidia Tegra TX1, Performance

February 14, 2017 by hgpu

SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing

Ao Ren, Ji Li, Zhe Li, Caiwen Ding, Xuehai Qian, Qinru Qiu, Bo Yuan, Yanzhi Wang

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Tags: ASIC, CNN, Computer science, Deep learning, FPGA, Neural networks, nVidia, Tesla C2075

November 22, 2016 by hgpu

Runtime Configurable Deep Neural Networks for Energy-Accuracy Trade-off

Hokchhay Tann, Soheil Hashemi, R. Iris Bahar, Sherief Reda

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Tags: Algorithms, ARM, ASIC, Computer science, CUDA, Deep learning, Neural networks, nVidia, nVidia Tegra TX1

July 20, 2016 by hgpu

Hardware Acceleration for Unstructured Big Data and Natural Language Processing

Prateek Tandon

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Tags: ASIC, big data, Computer science, FPGA, Hadoop, hardware acceleration, Machine learning, MapReduce, NLP, Thesis

February 2, 2016 by hgpu

Origami: A Convolutional Network Accelerator

Lukas Cavigelli, David Gschwend, Christoph Mayer, Samuel Willi, Beat Muheim, Luca Benini

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Tags: Algorithms, Artificial intelligence, ASIC, Computer science, Computer vision, Machine learning, Neural networks

December 15, 2015 by hgpu

TABLA: A Unified Template-based Framework for Accelerating Statistical Machine Learning

Divya Mahajan, Jongse Park, Emmanuel Amaro, Hardik Sharma, Amir Yazdanbakhsh, Joon Kim, Hadi Esmaeilzadeh

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Tags: ARM, ASIC, Computer science, FPGA, Machine learning, nVidia, nVidia GeForce GTX 650 Ti, nVidia Jetson TK1, Performance, Tesla K40

September 29, 2015 by hgpu

RadixBoost: A Hardware Acceleration Structure for Scalable Radix Sort on Graphic Processors

Xingyu Liu, Shikai Li, Kuan Fang, Yufei Ni, Zonghui Li, Yangdong Deng

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Tags: Algorithms, ASIC, Computer science, FPGA, nVidia, nVidia GeForce GTX 580, Sorting

March 12, 2015 by hgpu

FastTree: A Hardware KD-Tree Construction Acceleration Engine for Real-Time Ray Tracing

Xingyu Liu, Yangdong Deng, Yufei Ni, Zonghui Li

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Tags: Algorithms, ASIC, Computer science, FPGA, KD-tree, Raytracing, Rendering

March 12, 2015 by hgpu

FPGA Acceleration of Multifunction Printer Image Processing using OpenCL

Timothy M. Hunter, Dmitry Denisenko, Sarnath Kannan, Jared M. Bold, Prasanthi Thippabathini, Peter Dusel P.E.

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Tags: ASIC, FPGA, Image processing, OpenCL

August 5, 2014 by hgpu

A Versatile Software Systolic Execution Model for GPU Memory-Bound Kernels

blockgmf: Block based approaches to Matrix Factorization

Block based Singular Value Decomposition approach to matrix factorization for recommender systems

CU2CL: A prototype CUDA-to-OpenCL source-to-source translator

On the Portability of CPU-Accelerated Applications via Automated Source-to-Source Translation

GPU-based Parallel Computation Support for Stan

PANNA: Properties from Artificial Neural Network Architectures

Artifact Evaluation for Novel methodologies for predictable CPU-to-GPU command offloading

Novel Methodologies for Predictable CPU-To-GPU Command Offloading

tvm: Open deep learning compiler stack for cpu, gpu and specialized accelerators

A Unified Optimization Approach for CNN Model Inference on Integrated GPUs

picongpu: Particle-in-Cell Simulations for the Exascale Era

PIConGPU: Predictive Simulations of Laser-Particle Accelerators with Manycore Hardware

WCCV: Warp-coherent Condition Vectorization(on top of RV)

WCCV: Improving the Vectorization of IF-statements with Warp-Coherent Conditions

Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations

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7th International Workshop on OpenCL, 2019

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Boston, MA, USA

Distributed Heterogeneous Programming in C/C++ (DHPCC++), 2019

2019

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Larnaca, Cyprus

3rd International Workshop on Theoretical Approaches to Performance Evaluation, Modeling and Simulation (TAPEMS), 2019

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26-28

Rome, Italy

International Conference on Frontiers of Neural Networks (ICFNN), 2019

2019

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26-28

Rome, Italy

International Conference on Frontiers of Artificial Intelligence and Machine Learning (FAIML), 2019

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high performance computing on graphics processing units: hgpu.org

The Accelerator Wall: Limits of Chip Specialization

BENCHIP: Benchmarking Intelligence Processors

Evaluation of GPU-based track-triggering for the CMS detector at CERN’s HL-LHC

Accelerating Binarized Neural Networks: Comparison of FPGA, CPU, GPU, and ASIC

SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing

Runtime Configurable Deep Neural Networks for Energy-Accuracy Trade-off

Hardware Acceleration for Unstructured Big Data and Natural Language Processing

Origami: A Convolutional Network Accelerator

TABLA: A Unified Template-based Framework for Accelerating Statistical Machine Learning

RadixBoost: A Hardware Acceleration Structure for Scalable Radix Sort on Graphic Processors

FastTree: A Hardware KD-Tree Construction Acceleration Engine for Real-Time Ray Tracing

FPGA Acceleration of Multifunction Printer Image Processing using OpenCL

Recent source codes

A Versatile Software Systolic Execution Model for GPU Memory-Bound Kernels

blockgmf: Block based approaches to Matrix Factorization

CU2CL: A prototype CUDA-to-OpenCL source-to-source translator

GPU-based Parallel Computation Support for Stan

PANNA: Properties from Artificial Neural Network Architectures

Artifact Evaluation for Novel methodologies for predictable CPU-to-GPU command offloading

tvm: Open deep learning compiler stack for cpu, gpu and specialized accelerators

picongpu: Particle-in-Cell Simulations for the Exascale Era

WCCV: Warp-coherent Condition Vectorization(on top of RV)

Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations

Most viewed papers (last 30 days)

Featured events

7th International Workshop on OpenCL, 2019

Distributed Heterogeneous Programming in C/C++ (DHPCC++), 2019

3rd International Workshop on Theoretical Approaches to Performance Evaluation, Modeling and Simulation (TAPEMS), 2019

International Conference on Frontiers of Neural Networks (ICFNN), 2019

International Conference on Frontiers of Artificial Intelligence and Machine Learning (FAIML), 2019