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High Resolution Program Flow Visualization of Hardware Accelerated Hybrid Multi-core Applications

Daniel Hackenberg, Guido Juckeland, Holger Brunst
Center for Inf. Services & High Performance Comput. (ZIH), Tech. Univ. Dresden, Dresden, Germany
10th IEEE/ACM International Conference on Cluster, Cloud and Grid Computing (CCGrid), 2010

@inproceedings{hackenberg2010high,

   title={High Resolution Program Flow Visualization of Hardware Accelerated Hybrid Multi-core Applications},

   author={Hackenberg, D. and Juckeland, G. and Brunst, H.},

   booktitle={2010 10th IEEE/ACM International Conference on Cluster, Cloud and Grid Computing},

   pages={786–791},

   year={2010},

   organization={IEEE}

}

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The advent of multi-core processors has made parallel computing techniques mandatory on main stream systems. With the recent rise of hardware accelerators, hybrid parallelism adds yet another dimension of complexity to the process of software development. This article presents a tool for graphical program flow analysis of hardware accelerated parallel programs. It monitors the hybrid program execution to record and visualize many performance relevant events along the way. Representative real-world applications written for both IBM’s Cell processor and NVIDIA’s CUDA API are studied exemplarily. To the best of our knowledge, this approach is the first that visualizes the parallelism in hybrid multi-core systems at the presented level of detail.
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