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Design and Implementation of a PTX Emulation Library

Albert Claret Exojo
Departament d’Arquitectura de Computadors, Universitat Politecnica de Catalunya
Universitat Politecnica de Catalunya, 2011

@article{claret2011design,

   title={Design and Implementation of a PTX Emulation Library},

   author={Claret Exojo, A. and others},

   year={2011},

   publisher={Universitat Polit{‘e}cnica de Catalunya}

}

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Intel co-founder Gordon E. Moore observed in 1965 that transistor density, the number of transistors that could be placed in an integrated circuit per square inch, increased exponentially, doubling roughly every two years. This would be later known as Moore’s Law, correctly predicting the trend that governed computing hardware manufacturing for the late 20th century. For many decades, software developers have enjoyed a steady application performance increase due to continuous hardware improvements as described by Moore’s Law, as well as computer architecture improvements. Currently, however, the memory wall, which refers to the increasing speed di erence between the CPU and memory, and the instruction-level parallelism wall (ILP wall ), which refers to the inability to nd more operations in an application which can be performed simultaneously due to data dependency, have been reached. Application performance no longer bene ts from continuous processor frequency increases as it had before. Furthermore, other issues such as wire delays and static and dynamic power density prevent signi cant processor frequency increases.
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