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Parallel Processing using FPGAs and GPUs

Abhijit Joshi
Department of Electrical Engineering, Indian Institute of Technology, Bombay
Indian Institute of Technology, 2012

@phdthesis{joshi2012parallel,

   title={Parallel Processing using FPGAs and GPUs},

   author={Joshi, A.},

   year={2012},

   school={INDIAN INSTITUTE OF TECHNOLOGY–BOMBAY}

}

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This report includes use of parallel architectures like that of the Graphic Processing Units (GPU) for general purpose computations. It also includes, filter design using Field Programmable Gate Arrays exploiting its, inherently parallel nature. Implementation of Least Mean Square filters, which is an adaptive filter algorithm, is done using Xilinx Virtex 5 FPGA, and tested with inputs and outputs through UART serial communication. The use of FIFO-Bram in the implementation is also explained. GPU simulation of cloth model deformation using CUDA based NVIDIA GPU is presented. Simulation of a ball bouncing on a cloth, is modeled using the classic mass-spring model, and the deformations are updated by force calculations on the GPU. The haptic force feedback constraint of 1ms was met even for higher dimensions of the cloth using such GPU implementation. This gives more realistic simulation of the cloth model. A technique for porting nonlinear device model evaluations in MNA, on GPUs based circuit simulator is shown using a toy example. A speed up of around 83x was obtained. DC and transient analysis is performed on GPU for different network topologies and results were found to be accurate as compared to CPU implementation. A partitioning scheme for improving the iterations required for convergence is built to reduce the number of Gauss Jacobi iterations and a considerable increase in speed up. Speeup of the order of 50x for R-R ladder circuit and 89x for R-R grid circuit were obtained. All results were taken on NVIDIA C2070 GPU and compared with Intel core i7 processor.
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