Evaluating Reconfigurable Dataflow Computing Using the Himeno Benchmark

Yukinori Sato, Yasushi Inoguchi, Wayne Luk, Tadao Nakamura
Research Center for Advanced Computing Infrastructure, JAIST, Japan
International Conference on ReConFigurable Computing and FPGAs, 2012

   title={Evaluating Reconfigurable Dataflow Computing Using the Himeno Benchmark},

   author={Sato, Y. and Inoguchi, Y. and Luk, W. and Nakamura, T.},

   booktitle={International Conference on ReConFigurable Computing and FPGAs},



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Heterogeneous computing using FPGA accelerators is a promising approach to boost the performance of application programs within given power consumption. This paper focuses on optimizations targeting FPGA-based reconfigurable dataflow computing platform, and shows how they benefit an application. In order to evaluate them, we use the Himeno benchmark, which is a floating point computation kernel known to be bound by memory bandwidth. To understand the performance characteristics of the benchmark, we compare it with the current state-of-the-art implementation on GPUs. From the results, we find that our implementation with specialized dataflow pipelines outperforms the current state-of-the-art GPU implementations by making full use of memory locality.
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