FlexGrip: A Soft GPGPU for FPGAs

Kevin Andryc, Murtaza Merchant, Russell Tessier
Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA
International Conference on Field-Programmable Technology, 2013


   title={FlexGrip: A Soft GPGPU for FPGAs},

   author={Andryc, Kevin and Merchant, Murtaza and Tessier, Russell},



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Over the past decade, soft microprocessors and vector processors have been extensively used in FPGAs for a wide variety of applications. However, it is difficult to straightforwardly extend their functionality to support conditional and thread-based execution characteristic of general-purpose graphics processing units (GPGPUs) without recompiling FPGA hardware for each application. In this paper, we describe the implementation of FlexGrip, a soft GPGPU architecture which has been optimized for FPGA implementation. This architecture supports direct CUDA compilation to a binary which is executable on the FPGA-based GPGPU without hardware recompilation. Our architecture is customizable, thus providing the FPGA designer with a selection of GPGPU cores which display performance versus area tradeoffs. The benefits of our architecture are evaluated for a collection of five standard CUDA benchmarks which are compiled using standard GPGPU compilation tools. Speedups of up to 30x versus a MicroBlaze microprocessor are achieved for designs which take advantage of the conditional execution capabilities offered by FlexGrip.
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