A Unified Runtime System for Heterogeneous Multi-core Architectures
INRIA Bordeaux, LaBRI, Universite Bordeaux 1, 351, cours de la Liberation, F-33405 TALENCE, France
In Euro-Par 2008 Wokshops (HPPC’08), Vol. 5415 (2009), pp. 174-183.
@conference{augonnet2009unified,
title={A Unified Runtime System for Heterogeneous Multi-core Architectures},
author={Augonnet, C. and Namyst, R.},
booktitle={Euro-Par 2008 Workshops-Parallel Processing},
pages={174–183},
year={2009},
organization={Springer}
}
Approaching the theoretical performance of heterogeneous multicore architectures, equipped with specialized accelerators, is a challenging issue. Unlike regular CPUs that can transparently access the whole global memory address range, accelerators usually embed local memory on which they perform all their computations using a specific instruction set. While many research efforts have been devoted to offloading parts of a program over such coprocessors, the real challenge is to find a programming model providing a unified view of all available computing units. In this paper, we present an original runtime system providing a high-level, unified execution model allowing seamless execution of tasks over the underlying heterogeneous hardware. The runtime is based on a hierarchical memory management facility and on a codelet scheduler. We demonstrate the efficiency of our solution with a LU decomposition for both homogeneous (3.8 speedup on 4 cores) and heterogeneous machines (95% efficiency). We also show that a “granularity aware” scheduling can improve execution time by 35%.
January 7, 2011 by hgpu