27215

Enhancing the Performance Portability of Heterogeneous Circuit Analysis Programs

Tsung-Wei Huang
Department of Electrical and Computer Engineering, University of Utah
IEEE High-Performance Extreme Computing Conference (HPEC), 2022

@article{huang2022enhancing,

   title={Enhancing the Performance Portability of Heterogeneous Circuit Analysis Programs},

   author={Huang, Tsung-Wei},

   year={2022}

}

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Recently, CPU-GPU heterogeneous parallelism has brought transformational performance milestones to static timing analysis (STA) algorithms. As the computing ecosystem continues to proliferate, performance portability has emerged as a new challenge when deploying the result to diverse heterogeneous computing platforms. Specifically, the optimal code written on a CPU-GPU architecture may not be optimal for other CPUGPU architectures, due to various performance, interoperability, and availability constraints. As a result, we introduce in this paper a learning-based framework to enhance the performance portability of a GPU-accelerated STA program. We parameterize important performance parameters and leverage a neural network model to adapt performance optimization to any given computing platforms. We have demonstrated the effectiveness of our framework in real STA applications.
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