Accelerating Particle Image Velocimetry Using Hybrid Architectures

Vivek Venugopal, Cameron D. Patterson, Kevin Shinpaugh
Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061
Symposium on Application Accelerators in High Performance Computing, 2009 (SAAHPC’09)


   title={Accelerating Particle Image Velocimetry using hybrid architectures},

   author={Venugopal, V. and Patterson, C. and Shinpaugh, K.},

   booktitle={Proceedings of Symposium on Application Accelerators in High Performance Computing (SAAHPC’09), Urbana, Illinois},



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High Performance Computing (HPC) applications are mapped to a cluster of multi-core processors communicating using high speed interconnects. More computational power is harnessed with the addition of hardware accelerators such as Graphics Processing Unit (GPU) cards and Field Programmable Gate Arrays (FPGAs). Particle Image Velocimetry (PIV) is an embarrassingly parallel application that can benefit from acceleration using hybrid architectures. The PIV application is mapped to a Nvidia GPU system, resulting in 3x speedup over a dual quad-core Intel processor implementation. The design methodology used to implement the PIV application on a specialized FPGA platform under development is described in brief and the resulting performance benefit is analyzed.
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