A GPU/CUDA implementation of the collection-diffusion model to compute SER of large area and complex circuits
Aix-Marseille University and CNRS, Institute of Materials, Microelectronics and Nanosciences of Provence (IM2NP, UMR CNRS 6242), Batiment IRPHE, 49 rue Joliot Curie, BP 146, F-13384 Marseille Cedex 13, France
IEEE International Conference on IC Design and Technology (ICICDT), 2010
@inproceedings{autran2010gpu,
title={A GPU/CUDA implementation of the collection-diffusion model to compute SER of large area and complex circuits},
author={Autran, JL and Uznanski, S. and Martinie, S. and Roche, P. and Gasiot, G. and Munteanu, D.},
booktitle={IC Design and Technology (ICICDT), 2010 IEEE International Conference on},
pages={67–70},
year={2010},
organization={IEEE}
}
This work reports the CUDA implementation of the collection-diffusion model to compute the soft-error rate (SER) of large area and/or complex circuits on graphics processing units (GPU). We detail the time parallelization introduced in the algorithm to accelerate by one order of magnitude the SER calculation. Code performances are evaluated on a NVIDIA Tesla C1060 GPU card for the calculation of the SER of a 65 nm SRAM circuit subjected to an alpha-particle source irradiation.
June 1, 2011 by hgpu
