high performance computing on graphics processing units: hgpu.org

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Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

Liam Cooper, Shinnung Jeong, Hyeran Jeon, Jeffrey Young, Hyesoon Kim

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Tags: Computer science, CUDA, Hardware Architecture, LLM, nVidia, nVidia A100, nVidia H100, nVidia L40s, Package

September 28, 2026 by hgpu

Automated Instruction Encoding Synthesis for Modern GPU ISA Compression

Mingyuan Ma, Hu He

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Tags: Computer science, CUDA, Hardware Architecture, nVidia, Package, Programming Languages

September 20, 2026 by hgpu

Concurrency Response of Plain Global Loads on the NVIDIA H100

Somashekar Manjunath, Rahul Ramachandra M

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Tags: Computer science, CUDA, Hardware Architecture, nVidia, nVidia H100, Performance

August 30, 2026 by hgpu

GPU-Initiated Networking for NCCL

Khaled Hamidouche, John Bachan, Pak Markthub, Peter-Jan Gootzen, Elena Agostini, Sylvain Jeaugey, Aamir Shafi, Georgios Theodorakis, Manjunath Gorentla Venkata

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Tags: Computer science, CUDA, Hardware Architecture, Machine learning, nVidia, nVidia H100

November 30, 2025 by hgpu

Analyzing Modern NVIDIA GPU cores

Rodrigo Huerta, Mojtaba Abaie Shoushtary, José-Lorenzo Cruz, Antonio González

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Tags: Computer science, Hardware Architecture, nVidia, nVidia RTX A6000

March 30, 2025 by hgpu

Good things come in small packages: Should we adopt Lite-GPUs in AI infrastructure?

Burcu Canakci, Junyi Liu, Xingbo Wu, Nathanaël Cheriere, Paolo Costa, Sergey Legtchenko, Dushyanth Narayanan, Ant Rowstron

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Tags: AI, Computer science, Hardware Architecture

January 27, 2025 by hgpu

Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

Weile Luo, Ruibo Fan, Zeyu Li, Dayou Du, Hongyuan Liu, Qiang Wang, Xiaowen Chu

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Tags: Benchmarking, Computer science, CUDA, Hardware Architecture, nVidia, nVidia A100, nVidia GeForce RTX 4090, nVidia H800, Performance, PTX

January 27, 2025 by hgpu

A survey on FPGA-based accelerator for ML models

Feng Yan, Andreas Koch, Oliver Sinnen

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Tags: Computer science, FPGA, Hardware Architecture, Machine learning, survey

December 29, 2024 by hgpu

Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems

Ayush Gundawar, Euijun Chung, Hyesoon Kim

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Tags: Computer science, Hardware Architecture, Machine learning, Performance

December 15, 2024 by hgpu

Hardware Accelerators for Artificial Intelligence

S M Mojahidul Ahsan, Anurag Dhungel, Mrittika Chowdhury, Md Sakib Hasan, Tamzidul Hoque

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Tags: AI, Computer science, Hardware Architecture, Performance, survey

December 1, 2024 by hgpu

FTTN: Feature-Targeted Testing for Numerical Properties of NVIDIA & AMD Matrix Accelerators

Xinyi Li, Ang Li, Bo Fang, Katarzyna Swirydowicz, Ignacio Laguna, Ganesh Gopalakrishnan

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Tags: AMD Radeon Instinct MI100, AMD Radeon Instinct MI250X, ATI, Computer science, Hardware Architecture, HPC, Matrix multiplication, nVidia, nVidia A100, nVidia H100, nVidia V100, PTX

March 10, 2024 by hgpu

A Survey on Hardware Accelerators for Large Language Models

Christoforos Kachris

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Tags: Computer science, Energy-efficient computing, FPGA, Hardware Architecture, NLP, survey

January 21, 2024 by hgpu

KernelZero: Co-Evolving Proposer and Coder for Continuously Improved GPU Kernel Generation

Introduction to Computer Vision

ACT: Accelerator Compiler Toolkit

Automatically Generating ML Compiler Backends from Tensor Accelerator ISA Descriptions

pytest-gpu-proof: A Simple Pytest Extension for Local GPU Code Testing

pytest-gpu-proof: Enabling Cloud-CPU Continuous Integration for GPU Code with Local GPU Attestation

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

AutoTuneBench: Trustworthy Measurement for Agent Auto-Tuning of LLM Serving Engines

nvsass-disassembler

Automated Instruction Encoding Synthesis for Modern GPU ISA Compression

PrefixBench-H100: Characterizing Prefix Reuse and Time-to-First-Token in H100 LLM Serving

EinsummableV3 - graph-based computation with tensor operations support

Every Kernel Is a Join: Automatic Multi-GPU Parallelism for AI Computations in Einsummable

MaxKernel: Intelligent TPU Kernel Engineering Agents

MaxKernel: Agentic Kernel Generation for TPUs

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high performance computing on graphics processing units: hgpu.org

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

Automated Instruction Encoding Synthesis for Modern GPU ISA Compression

Concurrency Response of Plain Global Loads on the NVIDIA H100

GPU-Initiated Networking for NCCL

Analyzing Modern NVIDIA GPU cores

Good things come in small packages: Should we adopt Lite-GPUs in AI infrastructure?

Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis

A survey on FPGA-based accelerator for ML models

Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems

Hardware Accelerators for Artificial Intelligence

FTTN: Feature-Targeted Testing for Numerical Properties of NVIDIA & AMD Matrix Accelerators

A Survey on Hardware Accelerators for Large Language Models

Recent source codes

KernelZero: Co-Evolving Proposer and Coder for Continuously Improved GPU Kernel Generation

Introduction to Computer Vision

ACT: Accelerator Compiler Toolkit

pytest-gpu-proof: A Simple Pytest Extension for Local GPU Code Testing

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

AutoTuneBench: Trustworthy Measurement for Agent Auto-Tuning of LLM Serving Engines

nvsass-disassembler

PrefixBench-H100: Characterizing Prefix Reuse and Time-to-First-Token in H100 LLM Serving

EinsummableV3 - graph-based computation with tensor operations support

MaxKernel: Intelligent TPU Kernel Engineering Agents

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