Accelerating Regular LDPC Code Decoders on GPUs

C.-C. Chang, Y.-L. Chang, M.-Y. Huang, B. Huang
Department of Electrical Engineering, National Taipei University of Technology, Taipei, Taiwan
IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing, 2011


   title={Accelerating Regular LDPC Code Decoders on GPUs},

   author={Chang, C.C. and Chang, Y.L. and Huang, M.Y. and Huang, B.},

   journal={Selected Topics in Applied Earth Observations and Remote Sensing, IEEE Journal of},






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Modern active and passive satellite and airborne sensors with higher temporal, spectral and spatial resolutions for Earth remote sensing result in a significant increase in data volume. This poses a challenge for data transmission over error-prone wireless links to a ground receiving station. Low-density parity-check (LDPC) codes have been adopted in modern communication systems for robust error correction. Demands for LDPC decoders at a ground receiving station for efficient and flexible data communication links have inspired the usage of a cost-effective high-performance computing device. In this paper we propose a graphic-processing-unit (GPU)-based regular LDPC decoders with the log sum-product iterative decoding algorithm (log-SPA). The GPU code was written to run NVIDIA GPUs using the compute unified device architecture (CUDA) language with a novel implementation of asynchronous data transfer for LDPC decoding. Experimental results showed that the proposed GPU-based high-throughput regular LDPC decoder achieved a significant 271x speedup compared to its CPU-based single-threaded counterpart written in the C language.
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