Feature-based speed limit sign detection using a graphics processing unit

Vladimir Glavtchev, Pinar Muyan-Ozcelik, Jeffrey M. Ota, John D. Owens
Univ. of California at Davis, USA
IEEE Intelligent Vehicles Symposium (IV), 2011


   title={Feature-Based Speed Limit Sign Detection Using a Graphics Processing Unit},

   author={Glavtchev, V. and Muyan-Oz{c{c}}elik, P. and Ota, J.M. and Owens, J.D.},

   booktitle={IEEE Intelligent Vehicles Symposium (IV), 2011},



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In this study we test the idea of using a graphics processing unit (GPU) as an embedded co-processor for real-time detection of European Union (EU) speed-limit signs. The input to the system is a set of grayscale videos recorded from a forward-facing camera mounted in a vehicle. We introduce a new technique for implementing the radial symmetry detector (RSD) efficiently using the native rendering capabilities of a GPU. The technique maps the algorithms to the hardware such that the detection of speed-limit sign candidates is significantly accelerated. The system reaches up to 88% detection rate and runs at 33 frames per second on video sequences with VGA (640×480) resolution on an embedded system with an Intel Atom 230 @ 1.67 GHz CPU and a NVIDIA GeForce 9400M GS GPU.
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