Python for Development of OpenMP and CUDA Kernels for Multidimensional Data

Zane W. Bell, Greg G. Davidson, Ed D’Azevedo, Thomas M. Evans, Wayne Joubert, John K. Munro, Jr., Dilip R. Patlolla, Bogdan Vacaliuc
Nuclear Material Detection and Characterization/NSTD/ORNL
Symposium on Application Accelerators in High-Performance Computing (SAAHPC), 2011


   title={Python for Development of OpenMP and CUDA Kernels for Multidimensional Data},

   author={Vacaliuc, B. and Patlolla, D.R. and D’Azevedo, E. and Davidson, G.G. and Munro Jr, J.K. and Evans, T.M. and Joubert, W. and Bell, Z.W.},

   booktitle={Application Accelerators in High-Performance Computing (SAAHPC), 2011 Symposium on},





Design of data structures for high performance computing (HPC) is one of the principal challenges facing researchers looking to utilize heterogeneous computing machinery. Heterogeneous systems derive cost, power, and speed efficiency by being composed of the appropriate hardware for the task. Yet, each type of processor requires a specific organization of the application state in order to achieve peak performance. Discovering this and refactoring the code can be a challenging and time-consuming task for the researcher, as the data structures and the computational model must be co-designed. We present a methodology that uses Python as the environment for which to explore tradeoffs in both the data structure design as well as the code executing on the computation accelerator. Our method enables multi-dimensional arrays to be used effectively in any target environment. We have chosen to focus on OpenMP and CUDA environments, thus exploring the development of optimized kernels for the two most common classes of computing hardware available today: multi-core CPU and GPU. Python’s large palette of file and network access routines, its associative indexing syntax and support for common HPC environments makes it relevant for diverse hardware ranging from laptops through computing clusters to the highest performance supercomputers. Our work enables researchers to accelerate the development of their codes on the computing hardware of their choice.
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