Flexible neuronal network simulation framework using code generation for NVidia CUDA

Thomas Nowotny
Informatics, University of Sussex, Falmer, Brighton, UK
BMC Neuroscience 12(Suppl 1):P239, 2011


   title={Flexible neuronal network simulation framework using code generation for NVidia{textregistered} CUDA},

   author={Nowotny, T.},

   journal={BMC Neuroscience},


   number={Suppl 1},



   publisher={BioMed Central Ltd}


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Simulating large scale computer models of brain structures with spiking neuronal networks has become increasingly popular and feasible with the advent of general purpose computing on graphical processing units (GPGPU). Modern graphics cards, such as the NVidia range supporting the common unified device architecture (CUDA) provide massively parallel computing architectures for this purpose. Earlier GPU implementations of neural networks, including my own earlier work [1,2], were customized for specific models, and optimized and tested with specific hardware. Recently, more general spiking neuronal network simulators have been developed [3,4] that allow the definition of the network connectivity and neuron- and synapse parameters at runtime. However, the simulators are still quite specific in using a single neuron model (typically Izhikevich neurons), synapse model (typically stateless synapses with delay) and have been tested for a typical model type and on specific GPU hardware.
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