Compiling for a heterogeneous vector image processor
CRI, Maths & Systems, MINES ParisTech, France
9th Workshop on Optimizations for DSP and Embedded Systems (ODES-9), 2011
@article{coelho2011compiling,
title={Compiling for a heterogeneous vector image processor},
author={Coelho, F. and Irigoin, F.},
journal={Workhop on Optimizations for DSP and Embedded Systems (ODES’9), Chamonix, France},
year={2011}
}
We present a new compilation strategy, implemented at a small cost, to optimize image applications developed on top of a high level image processing library for an heterogeneous processor with a vector image processing accelerator. The library provides the semantics of the image computations. The pipelined structure of the accelerator allows to compute whole expressions with dozens of elementary image instructions, but is constrained as intermediate image values cannot be extracted. We adapted standard compilation techniques to perform this task automatically. Our strategy is implemented in PIPS, a source-to-source compiler which greatly reduces the development cost as standard phases are reused and parameterized for the target. Experiments were run on the hardware functional simulator. We compile 1217 cases, from elementary tests to full applications. All are optimal but a few which are mostly within a mere accelerator call of optimality. Our contributions include: 1) a general low cost compilation strategy for image processing applications, based on the semantics provided by library calls, which improves locality by an order of magnitude; 2) a specific heuristic to minimize execution time on the target vector accelerator; 3) numerous experiments that show the effectiveness of our strategy.
November 12, 2011 by hgpu