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A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems

Sparsh Mittal and Jeffrey S. Vetter

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Tags: 3D memory, bandwidth compression, cache, classification, cpu, GPU, HPC, main memory, NVM, Review

May 18, 2015 by sparsh0mittal

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high performance computing on graphics processing units: hgpu.org

A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems

Recent source codes

KTT - Kernel Tuning Toolkit

UPC++: a PGAS library for C++

cuFINUFFT: a load-balanced GPU library for general-purpose nonuniform FFTs

KTT - Kernel Tuning Toolkit

HSA-on-FPGA

SYCL for Vitis 2020.1: experimental melting pot with Intel oneAPI DPC++ SYCL and triSYCL for Xilinx FPGA

AutoFreeze: Automatically Freezing Model Blocks to Accelerate Fine-tuning

C-for-Metal: High Performance SIMD Programming on Intel GPUs

Efficient MPI-based Communication for GPU-Accelerated Dask Applications

Text2Gestures: A Transformer-Based Network for Generating Emotive Body Gestures for Virtual Agents

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Featured events

9th International Workshop on OpenCL and SYCL, 2021

The 18th International Conference on High Performance Computing & Simulation (HPCS), 2020

The Fifth International Workshop on GPU Computing and AI (GCA), 2020

2nd International Conference on Frontiers of Intelligent Manufacturing and Automation (CFIMA’21), 2021

International Conference on Cyber Physical Systems and IoT (CPSIOT’20), 2020