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Graph-based Parallel Analysis of Large Analog Circuits Based on GPU Platforms

Jianan Lu, Zhigang Hao, Sheldon X.-D. Tan
Department of Electrical Engineering, University of California, Riverside, CA 92521
ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU Workshop), 2011

@article{lu2011graph,

   title={Graph-based Parallel Analysis of Large Analog Circuits Based on GPU Platforms},

   author={Lu, J. and Hao, Z. and Sheldon, X.D.T.},

   year={2011}

}

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In this paper, we propose a new parallel analysis method for large analog circuits using determinant decision diagram (DDD) based graph technique. DDD-based symbolic analysis technique enables exact symbolic analysis of vary large analog circuits. Once the circuit small-signal characteristics are presented by DDDs, evaluation of DDDs will give exact numerical values. In this paper, we develop efficient parallel DDD evaluation techniques based on general purpose GPU (GPGPU) computing platform to explore the parallelism of DDD structures. We propose two parallelization algorithms and their performance are compared. Experimental results show that the new evaluation algorithm can achieve about one to two order of magnitudes speedup over the serial CPU based evaluations on some large analog circuits.
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