A Hybrid CPU/GPU Pattern-Matching Algorithm for Deep Packet Inspection

Chun-Liang Lee, Yi-Shan Lin, Yaw-Chung Chen
Department of Computer Science and Information Engineering, School of Electrical and Computer Engineering, College of Engineering, Chang Gung University, Taoyuan, Taiwan
PLoS ONE 10(10): e0139301, 2015


   title={A Hybrid CPU/GPU Pattern-Matching Algorithm for Deep Packet Inspection},

   author={Lee, Chun-Liang and Lin, Yi-Shan and Chen, Yaw-Chung},

   journal={PloS one},





   publisher={Public Library of Science}


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The large quantities of data now being transferred via high-speed networks have made deep packet inspection indispensable for security purposes. Scalable and low-cost signature-based network intrusion detection systems have been developed for deep packet inspection for various software platforms. Traditional approaches that only involve central processing units (CPUs) are now considered inadequate in terms of inspection speed. Graphic processing units (GPUs) have superior parallel processing power, but transmission bottlenecks can reduce optimal GPU efficiency. In this paper we describe our proposal for a hybrid CPU/GPU pattern-matching algorithm (HPMA) that divides and distributes the packet-inspecting workload between a CPU and GPU. All packets are initially inspected by the CPU and filtered using a simple pre-filtering algorithm, and packets that might contain malicious content are sent to the GPU for further inspection. Test results indicate that in terms of random payload traffic, the matching speed of our proposed algorithm was 3.4 times and 2.7 times faster than those of the AC-CPU and AC-GPU algorithms, respectively. Further, HPMA achieved higher energy efficiency than the other tested algorithms.
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