SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

Youssef Faqir-Rhazoui, Carlos García
Universidad Complutense de Madrid
Universidad Complutense de Madrid, 2023


   title={SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration},

   author={Faqir-Rhazoui, Youssef and Garc{‘i}a, Carlos},



Edge computing is essential to handle increasing data volumes and processing capacities. It provides real-time, secure data processing near data sources, like smart devices, alleviating cloud computing energy use and saving network bandwidth. Specialized accelerators, like GPUs and FPGAs, are vital for low-latency edge computing but the requirements to customized code for different hardware and vendors supposes important compatibility issues. This paper evaluates the potential of SYCL in addressing code portability issues encountered in edge computing. We employed the Polybench suite to compare various SYCL implementations, specifically DPC++ and AdaptiveCpp, with the native solution, CUDA. The disparity between SYCL implementations was negligible, at just 5%. Furthermore, we evaluated SYCL in the context of specific edge computing applications such as video processing using three different optical flow algorithms. The results exposed a potential performance gap of 19% between CUDA and SYCL. This performance differential is the price one may need to pay when achieving the ability to successfully run the same code on two distinct edge boards with four different architectures, including x86/64 CPU, ARM CPU, NVIDIA GPU, and Intel GPU. These findings underscore SYCL’s capacity to increase productivity in term of development costs and facilitate the IoT deployment without being locked into a particular platform or manufacturer.
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