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Design Space Exploration for GPU-Based Architecture

Zhenyu Ye
Electronic Systems Group of Electrical Engineering Department, Eindhoven Unviersity of Technology
Eindhoven Unviersity of Technology, 2009

@article{ye2009design,

   title={Design Space Exploration for GPU-Based Architecture},

   author={Ye, Z. and Corporaal, H.H. and others},

   year={2009},

   publisher={Technische Universiteit Eindhoven}

}

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Recent advances in Graphics Processing Units (GPUs) provide opportunities to exploit GPUs for non-graphics applications. Scientific computation is inherently parallel, which is a good candidate to utilize the computing power of GPUs. This report investigates QR factorization, which is an important building block of scientific computation. We analyze different mapping mtheods of QR factorization on GPUs. The bottlenecks of them are identified using an analytical model. The limitations of GPUs and its implications on selection of algorithm are discussed. To explore the design space of parallel processing architecture, an equal-area model is proposed. Given an application and an amount of chip area, the equal-area model can provide quantitative information on performance and bottleneck for making design decisions.
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