CUDA-based AES parallelization with fine-tuned GPU memory utilization

Chonglei Mei, Hai Jiang, Jeff Jenness
Department of Computer Science, Arkansas State University
IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW), 2010


   title={CUDA-based AES parallelization with fine-tuned GPU memory utilization},

   author={Mei, C. and Jiang, H. and Jenness, J.},

   booktitle={Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW), 2010 IEEE International Symposium on},





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Current Graphics Processing Unit (GPU) presents large potentials in speeding up computationally intensive data parallel applications over traditional parallelization approaches since there are much more hardware threads inside GPUs than the computational cores available to common CPU threads. NVIDIA developed a generic GPU programming platform, CUDA, which allows programmers to utilize GPU through C programming language and parallelize applications in a similar way as in traditional multithreading approach. However, not all applications are suitable for this new platform. Only computationally intensive applications without strong dependency are good candidates. Although Advanced Encryption Standard (AES) does not belong to this group due to the light workload in its efficient implementation, this paper proposed an approach to arrange data in different GPU memory spaces properly, overcoming the extra communication delay, and still turning GPU into an effective accelerator. Experimental results have demonstrated its effectiveness by performance gains and proved that GPU can be used to accelerate more types of applications.
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