An algorithmic incremental and iterative development method to parallelize dusty-deck FORTRAN HPC codes in GPGPUs using CUDA
Res. Lab., Iran Univ. of Sci. & Technol., Tehran, Iran
Application of Information and Communication Technologies, 2009. AICT 2009. International Conference on
@conference{ghaemian2009algorithmic,
title={An algorithmic incremental and iterative development method to parallelize dusty-deck FORTRAN HPC codes in GPGPUs using CUDA},
author={Ghaemian, N. and Sharifi, M. and Minaei, B. and Orujov, R.},
booktitle={Application of Information and Communication Technologies, 2009. AICT 2009. International Conference on},
pages={1–7},
organization={IEEE}
}
State-of-the-art high-speed and economical graphic card processors (GPUs) provide high multiprocessing power for high performance computing (HPC). But software development for high performance computing is profound and requires a good comprehension of algorithms, applications, and architectures. This paper outlines an incremental and iterative software development process for porting dusty-deck HPC application source codes to a selected GPU-enabled architecture. A new type of dependency, namely recurrent transmission dependency, is introduced. Some experiments are reported.
April 6, 2011 by hgpu
