Michael Steffen, Veerendra Allada, Phillip Jones and Joseph Zambreno
Electrical and Computer Engineering, Iowa State University, Ames, IA, USA
8th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE), 2010



   author={Steffen, M. and Allada, V. and Jones, P. and Zambreno, J.},

   booktitle={Formal Methods and Models for Codesign (MEMOCODE), 2010 8th IEEE/ACM International Conference on},




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The 2010 MEMOCODE Hardware Software Co-design challenge is to implement a Deep Packet Inspection architecture, called the CANSCID – Combined Architecture for Stream Categorization and Intrusion Detection. In this short paper, we present the design details of our submission, that utilizes a Graphical Processing Unit (GPU) to accelerate the parallel regular expression matching. The target line rate of 500 Mbps is met on all of the 25 mandatory and 10 optional patterns. The design is developed using the NVIDIA CUDA framework and tested on the Tesla GPU.
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