Efficient reconfigurable design for pricing asian options

Anson H.T. Tse, David B. Thomas, K.H. Tsoi, Wayne Luk
Department of Computing, Imperial College London, UK
ACM SIGARCH Computer Architecture News, Vol.38, No.4, 2010, page(s): 14-20


   title={Efficient reconfigurable design for pricing asian options},

   author={Tse, A.H.T. and Thomas, D.B. and Tsoi, KH and Luk, W.},

   journal={ACM SIGARCH Computer Architecture News},







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Arithmetic Asian options are financial derivatives which have the feature of path-dependency: they depend on the entire price path of the underlying asset, rather than just the instantaneous price. This path-dependency makes them difficult to price, as only computationally intensive Monte-Carlo methods can provide accurate prices. This paper proposes an FPGA-accelerated Asian option pricing solution, using a highly-optimised parallel Monte-Carlo architecture. The proposed pipelined design is described parametrically, facilitating its re-use for different technologies. An implementation of this architecture in a Virtex-5 xc5vlx330t FPGA at 200MHz is 313 times faster than a multi-threaded software implementation running on a Intel Xeon E5420 quad-core CPU at 2.5GHz; it is also 2.2 times faster than the Tesla C1060 GPU at 1.3 GHz.
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