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ANGHABENCH: a Suite with One Million Compilable C Benchmarks for Code-Size Reduction

Anderson Faustino da Silva, Bruno Conde Kind, Jose Wesley de Souza Magalhaes, Jeronimo Nunes Rocha, Breno Campos Ferreira Guimaraes, Fernando Magno Quintao Pereira

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Tags: Algorithms, Benchmarking, Code generation, Compiler, Computer science, LLVM, Package

December 20, 2020 by hgpu

A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-volatile On-chip Caches

Sparsh Mittal; Jeffrey S. Vetter; Dong Li

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Tags: cache, Compiler, cpu, Energy-efficient computing, GPU, Hardware Architecture, Memory model

January 12, 2015 by sparsh0mittal

Adaptive Input-aware Compilation for Graphics Engines

Mehrzad Samadi, Amir Hormati, Mojtaba Mehrara, Janghaeng Lee, and Scott Mahlke

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Tags: Compiler, CUDA, GPU, nVidia, nVidia GeForce GTX 285, Optimization, Portability, Streaming, Tesla C2050

March 31, 2012 by Moaddeli

KTT - Kernel Tuning Toolkit

Using hardware performance counters to speed up autotuning convergence on GPUs

UPC++: a PGAS library for C++

A Newcomer In The PGAS World – UPC++ vs UPC: A Comparative Study

cuFINUFFT: a load-balanced GPU library for general-purpose nonuniform FFTs

KTT - Kernel Tuning Toolkit

Searching CUDA code autotuning spaces with hardware performance counters: data from benchmarks running on various GPU architectures

HSA-on-FPGA

Transparent FPGA Acceleration with TensorFlow

SYCL for Vitis 2020.1: experimental melting pot with Intel oneAPI DPC++ SYCL and triSYCL for Xilinx FPGA

triSYCL for Xilinx FPGA

AutoFreeze: Automatically Freezing Model Blocks to Accelerate Fine-tuning

C-for-Metal: High Performance SIMD Programming on Intel GPUs

Efficient MPI-based Communication for GPU-Accelerated Dask Applications

Text2Gestures: A Transformer-Based Network for Generating Emotive Body Gestures for Virtual Agents

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Shenzhen, China

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Bangkok, Thailand

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high performance computing on graphics processing units: hgpu.org

ANGHABENCH: a Suite with One Million Compilable C Benchmarks for Code-Size Reduction

A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-volatile On-chip Caches

Adaptive Input-aware Compilation for Graphics Engines

Recent source codes

KTT - Kernel Tuning Toolkit

UPC++: a PGAS library for C++

cuFINUFFT: a load-balanced GPU library for general-purpose nonuniform FFTs

KTT - Kernel Tuning Toolkit

HSA-on-FPGA

SYCL for Vitis 2020.1: experimental melting pot with Intel oneAPI DPC++ SYCL and triSYCL for Xilinx FPGA

AutoFreeze: Automatically Freezing Model Blocks to Accelerate Fine-tuning

C-for-Metal: High Performance SIMD Programming on Intel GPUs

Efficient MPI-based Communication for GPU-Accelerated Dask Applications

Text2Gestures: A Transformer-Based Network for Generating Emotive Body Gestures for Virtual Agents

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Featured events

9th International Workshop on OpenCL and SYCL, 2021

The 18th International Conference on High Performance Computing & Simulation (HPCS), 2020

The Fifth International Workshop on GPU Computing and AI (GCA), 2020

2nd International Conference on Frontiers of Intelligent Manufacturing and Automation (CFIMA’21), 2021

International Conference on Cyber Physical Systems and IoT (CPSIOT’20), 2020