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Stencil Computation at the Intersection of AI and HPC

Timothee Ewart, Mauricio Araya-Polo

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Tags: AI, AMD, AMD Radeon Instinct MI325X, Computer science, HPC, Intel Arc B580, Intel B70, Intel Data Center GPU Max 1550, nVidia, nVidia A100, nVidia H100, nVidia RTX PRO 6000, performance portability, Stencil computation, SYCL, Triton

September 14, 2026 by hgpu

Brian2 Atlas

A Unified Intermediate Representation and Execution Architecture for Heterogeneous and Distributed Neural Simulation

AgentGarten: Code Worlds for Evolving Agents

AgentGarten: Code Worlds for Evolving Agents

KernelLens: Automated Triton-to-C++ Compiler for Enterprise Inference Runtimes

KernelLens: Deploying Triton Kernels to C++ Inference Engines

KernelZero: Co-Evolving Proposer and Coder for Continuously Improved GPU Kernel Generation

KernelZero: Co-Evolving Proposer and Coder for Continuously Improved GPU Kernel Generation

Introduction to Computer Vision

Introduction to Computer Vision

ACT: Accelerator Compiler Toolkit

Automatically Generating ML Compiler Backends from Tensor Accelerator ISA Descriptions

pytest-gpu-proof: A Simple Pytest Extension for Local GPU Code Testing

pytest-gpu-proof: Enabling Cloud-CPU Continuous Integration for GPU Code with Local GPU Attestation

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

AutoTuneBench: Trustworthy Measurement for Agent Auto-Tuning of LLM Serving Engines

AutoTuneBench: Trustworthy Measurement for Agent Auto-Tuning of LLM Serving Engines

nvsass-disassembler

Automated Instruction Encoding Synthesis for Modern GPU ISA Compression

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