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Anonymized Network Sensing using C++26 std::execution on GPUs

Michael Mandulak, Sayan Ghosh, S M Ferdous, Mahantesh Halappanavar, George Slota

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Tags: Computer science, CUDA, Network communication, nVidia, nVidia A100

October 19, 2025 by hgpu

Demystifying NCCL: An In-depth Analysis of GPU Communication Protocols and Algorithms

Zhiyi Hu, Siyuan Shen, Tommaso Bonato, Sylvain Jeaugey, Cedell Alexander, Eric Spada, Jeff Hammond, Torsten Hoefler

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Tags: Computer science, CUDA, GPU cluster, Network communication, nVidia, nVidia GH200

July 13, 2025 by hgpu

MATLAB Tensor Core models

Accurate Models of NVIDIA Tensor Cores

TritonForge: Transform PyTorch Operations into Optimized GPU Kernels with LLMs

TritonForge: Profiling-Guided Framework for Automated Triton Kernel Optimization

RLTune: Hybrid Learning and Optimization-Based Dynamic Scheduling for DL Workloads on Heterogeneous GPU Clusters

Hybrid Learning and Optimization-Based Dynamic Scheduling for DL Workloads on Heterogeneous GPU Clusters

tritonBLAS: A Lightweight Triton-based General Matrix Multiplication (GEMM) Library

tritonBLAS: Triton-based Analytical Approach for GEMM Kernel Parameter Selection

hls4ml: Machine learning on FPGAs using HLS

hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

NVIDIA Nemotron Parse 1.1

NVIDIA Nemotron Parse 1.1

ThunderKittens: Tile primitives for speedy kernels

ParallelKittens: Systematic and Practical Simplification of Multi-GPU AI Kernels

Iris: AMD RAD's multi-GPU Triton-based framework for seamless multi-GPU programming

Iris: First-Class Multi-GPU Programming Experience in Triton

HipKittens: Fast and Furious AMD Kernels

HipKittens: Fast and Furious AMD Kernels

Fortran xDSL dialects

An MLIR pipeline for offloading Fortran to FPGAs via OpenMP

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