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Posts

Dec, 3

OpenACC cache Directive: Opportunities and Optimizations

OpenACC’s programming model presents a simple interface to programmers, offering a trade-off between performance and development effort. OpenACC relies on compiler technologies to generate efficient code and optimize for performance. Among the difficult to implement directives, is the cache directive. The cache directive allows the programmer to utilize accelerator’s hardware- or software-managed caches by passing […]
Dec, 3

Accelerating string tokenization with FPGAs for IoT data handling equipment

This paper reports on the results of a study to accelerate string tokenization using FPGAs suitable for both IoT gateways and data center servers. The prototype developed with Xilinx High-Level Synthesis software runs at 200 MHz and processes up to 32 ASCII characters per clock cycle. It incorporates either OpenCL or our own framework (Volvox) […]
Dec, 3

Should I use TensorFlow?

Google’s Machine Learning framework TensorFlow was open-sourced in November 2015 [1] and has since built a growing community around it. TensorFlow is supposed to be flexible for research purposes while also allowing its models to be deployed productively. This work is aimed towards people with experience in Machine Learning considering whether they should use TensorFlow […]
Dec, 3

GeantV: from CPU to accelerators

The GeantV project aims to research and develop the next-generation simulation software describing the passage of particles through matter. While the modern CPU architectures are being targeted first, resources such as GPGPU, Intel© Xeon Phi, Atom or ARM cannot be ignored anymore by HEP CPU-bound applications. The proof of concept GeantV prototype has been mainly […]
Dec, 3

A Real-time Single Pulse Detection Algorithm for GPUs

The detection of non-repeating events in the radio spectrum has become an important area of study in radio astronomy over the last decade due to the discovery of fast radio bursts (FRBs). We have implemented a single pulse detection algorithm, for NVIDIA GPUs, which use boxcar filters of varying widths. Our code performs the calculation […]
Nov, 30

Hardware thread reordering to boost OpenCL throughput on FPGAs

Availability of OpenCL for FPGAs has raised new questions about the efficiency of massive thread-level parallelism on FPGAs. The general trend is toward creating deep pipelining and in-order execution of many OpenCL threads across a shared data-path. While this can be a very effective approach for regular kernels, its efficiency significantly diminishes for irregular kernels […]
Nov, 30

Parallelizing Word2Vec in Multi-Core and Many-Core Architectures

Word2vec is a widely used algorithm for extracting low-dimensional vector representations of words. State-of-the-art algorithms including those by Mikolov et al. have been parallelized for multi-core CPU architectures, but are based on vector-vector operations with "Hogwild" updates that are memory-bandwidth intensive and do not efficiently use computational resources. In this paper, we propose "HogBatch" by […]
Nov, 30

Optimization of Pattern Matching Algorithms for Multi- and Many-Core Platforms

Image and video compression play a major role in the world today, allowing the storage and transmission of large multimedia content volumes. However, the processing of this information requires high computational resources, hence the improvement of the computational performance of these compression algorithms is very important. The Multidimensional Multiscale Parser (MMP) is a pattern-matching-based compression […]
Nov, 30

Deep, Dense, and Low-Rank Gaussian Conditional Random Fields

In this work we introduce a fully-connected graph structure in the Deep Gaussian Conditional Random Field (G-CRF) model. For this we express the pairwise interactions between pixels as the inner-products of low-dimensional embeddings, delivered by a new subnetwork of a deep architecture. We efficiently minimize the resulting energy by solving the resulting low-rank linear system […]
Nov, 29

dCUDA: hardware supported overlap of computation and communication

Over the last decade, CUDA and the underlying GPU hardware architecture have continuously gained popularity in various high-performance computing application domains such as climate modeling, computational chemistry, or machine learning. Despite this popularity, we lack a single coherent programming model for GPU clusters. We therefore introduce the dCUDA programming model, which implements device-side remote memory […]
Nov, 27

2nd International Conference on Robotics and Automation Engineering (ICRAE), 2017

The ICRAE conference is an international forum for the presentation of technological advances and research results in the fields of Robotics and Automation Engineering.Researchers from across the world are welcome to attend and submit their best work to ICRAE 2017 conference to exchange ideas about the latest theories, technology, data, and videos furthering the state-of-the-art […]
Nov, 27

2nd International Conference on Computational Intelligence and Applications (ICCIA), 2017

The aim objective of ICCIA 2017 is to present the latest research and results of scientists related to Computational Intelligence and Applications topics. This conference provides opportunities for the different areas delegates to exchange new ideas and application experiences face to face, to establish business or research relations and to find global partners for future […]
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