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Sparsh Mittal; Jeffrey S. Vetter; Dong Li
Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large increase in the size of on-chip caches. Since SRAM has low density and consumes large amount of leakage power, its use in designing on-chip caches has become more challenging. To address this issue, researchers are exploring the use of […]
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Mehrzad Samadi, Amir Hormati, Mojtaba Mehrara, Janghaeng Lee, and Scott Mahlke
While graphics processing units (GPUs) provide low-cost and efficient platforms for accelerating high performance computations,the tedious process of performance tuning required to optimize applicationsis an obstacle to wider adoption of GPUs. In addition to the programmability challenges posed by GPU’s complex memory hierarchy and parallelism model, a well-known application design problem is target portability across […]
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