Jia Uddin, Emmanuel Oyekanlu, Cheol-Hong Kim, Jong-Myon Kim
The high speed CPU based routers currently in use could not handle the massive data required for real-time multimedia communication. Graphics processing units (GPUs) offer an appreciable alternative due to high computation power which results from their parallel execution units. This paper presents the implementation of the Dijkstra’s link state IP routing algorithm using GPU. […]
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Kazumasa Ikeuchi, Janaka Wijekoon, Shinichi Ishida, Hiroaki Nishi
Service-oriented router (SoR) is a new router architecture for providing rich services to Internet users by utilizing useful information extracted from network traffic. In SoR, stream reconstruction and selection is a fundamental process for providing the services in the application layer. After real-time reconstruction of stream data, SoR used a software character string analyzer to […]
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Weibin Sun, Robert Ricci
We introduce Snap, a framework for packet processing that outperforms traditional software routers by exploiting the parallelism available on modern GPUs. While obtaining high performance, it remains extremely flexible, with packet-processing tasks implemented as simple modular elements that are composed to build fully functional routers and switches. Snap is based on the Click modular router, […]
Xin Yao, Yaping Lin, Gang Wang, Guoliang Hu
As the fiber propagation velocity grows and the routing scale expands, IP lookup speed becomes the major bottleneck of high-performance network. Its efficiency directly determines the throughput of the entire routing channel. Recently, Graphics Processing Units (GPUs), highly parallel, flexibility for program and low price, is widely adopted in different areas including software router. In […]
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Yuhao Zhu, Yangdong Deng, Yubei Chen
With the constantly increasing Internet traffic and fast changing network protocols, future routers have to simultaneously satisfy the requirements for throughput, QoS, flexibility, and scalability. In this work, we propose a novel integrated CPU/GPU microarchitecture, Hermes, for QoS-aware high speed routing. We also develop a new thread scheduling mechanism, which significantly improves all QoS metrics.
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Kang Kang, Yangdong Steve Deng
Packet classification has been a fundamental processing pattern of modern networking devices. Today’s high-performance routers use specialized hardware for packet classification, but such solutions suffer from prohibitive cost, high power consumption, and poor extensibility. On the other hand, software-based routers offer the best flexibility, but could only deliver limited performance (
Youngjun Lee, Minseon Jeong, Sanghwan Lee, Eun-Jin Im
As the traffic of the Internet increases and diversifies, the needs for a fast flexible router have made researchers to work on software routers. The existing software router systems may utilize the cluster structure of multiple machines or GPU systems. Especially, Packet Shader, which uses GPU to exploit GPU’s extensive parallelism, shows higher performance compared […]
Shuai Mu, Xinya Zhang, Nairen Zhang, Jiaxin Lu, Yangdong Steve Deng, Shu Zhang
Throughput and programmability have always been the central, but generally conflicting concerns for modern IP router designs. Current high performance routers depend on proprietary hardware solutions, which make it difficult to adapt to ever-changing network protocols. On the other hand, software routers offer the best flexibility and programmability, but could only achieve a throughput one […]
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Sangjin Han, Keon Jang, KyoungSoo Park, Sue Moon
We present PacketShader, a high-performance software router framework for general packet processing with Graphics Processing Unit (GPU) acceleration. PacketShader exploits the massively-parallel processing power of GPU to address the CPU bottleneck in current software routers. Combined with our high-performance packet I/O engine, PacketShader outperforms existing software routers by more than a factor of four, forwarding […]
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