Benchmarking GPU Devices with N-Body Simulations

Daniel P. Playne, Mitchell Johnson, Kenneth A. Hawick
Computer Science, Institute for Information and Mathematical Sciences, Massey University, North Shore 102-904, Auckland, New Zealand
Proc. International Conference on Computer Design (CDES 09), Las Vegas, USA, 2009


   title={Benchmarking gpu devices with n-body simulations},

   author={Playne, DP and Johnson, MGB and Hawick, KA},

   booktitle={Proc. 2009 International Conference on Computer Design (CDES 09) July, Las Vegas, USA., no. CSTN-077},



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Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obtain high performance. We discuss the difficulties in establishing suitable benchmark codes for making comparisons across these device architectures and in a way that is representative of key applications. We report on our use of classical dynamical particle collision simulation codes as benchmarks for comparing modern GPUs. We discuss our findings in terms of architectural features for parallelism as well as clock speed issues.
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