Memory-Efficient Acceleration of Block Low-Rank Foundation Models on Resource Constrained GPUs
Department of Electrical Engineering & Computer Science, University of Michigan
arXiv:2512.20861 [cs.LG], (24 Dec 2025)
@misc{abillama2025memoryefficientaccelerationblocklowrank,
title={Memory-Efficient Acceleration of Block Low-Rank Foundation Models on Resource Constrained GPUs},
author={Pierre Abillama and Changwoo Lee and Juechu Dong and David Blaauw and Dennis Sylvester and Hun-Seok Kim},
year={2025},
eprint={2512.20861},
archivePrefix={arXiv},
primaryClass={cs.LG},
url={https://arxiv.org/abs/2512.20861}
}
Recent advances in transformer-based foundation models have made them the default choice for many tasks, but their rapidly growing size makes fitting a full model on a single GPU increasingly difficult and their computational cost prohibitive. Block low-rank (BLR) compression techniques address this challenge by learning compact representations of weight matrices. While traditional low-rank (LR) methods often incur sharp accuracy drops, BLR approaches such as Monarch and BLAST can better capture the underlying structure, thus preserving accuracy while reducing computations and memory footprints. In this work, we use roofline analysis to show that, although BLR methods achieve theoretical savings and practical speedups for single-token inference, multi-token inference often becomes memory-bound in practice, increasing latency despite compiler-level optimizations in PyTorch. To address this, we introduce custom Triton kernels with partial fusion and memory layout optimizations for both Monarch and BLAST. On memory-constrained NVIDIA GPUs such as Jetson Orin Nano and A40, our kernels deliver up to 3.76x speedups and 3x model size compression over PyTorch dense baselines using CUDA backend and compiler-level optimizations, while supporting various models including Llama-7/1B, GPT2-S, DiT-XL/2, and ViT-B. Our code is available.
December 29, 2025 by hgpu
Your response
You must be logged in to post a comment.





