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Visual Performance Analysis of Memory Behavior in a Task-Based Runtime on Hybrid Platforms

Lucas Leandro Nesi, Samuel Thibault, Luka Stanisic, Lucas Mello Schnorr

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Tags: Computer science, CUDA, Heterogeneous systems, nVidia, nVidia GeForce GTX 1080 Ti, Performance, StarPU

September 1, 2019 by hgpu

On Runtime Systems for Task-based Programming on Heterogeneous Platforms

Samuel Thibault

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Tags: Computer science, CUDA, Distributed computing, Heterogeneous systems, nVidia, nVidia Quadro FX 5800, OpenCL, Operating systems, StarPU, Task scheduling, Tesla C2050, Tesla K20, Tesla M2075, Thesis

December 23, 2018 by hgpu

Asynchronous Task-Based Polar Decomposition on Single Node Manycore Architectures

Dalal Sukkari, Hatem Ltaief, Mathieu Faverge, David Keyes

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Tags: Algorithms, Benchmarking, Computer science, Factorization, Intel Xeon Phi, nVidia, StarPU, Task scheduling, Tesla K80, Tesla P100

September 21, 2017 by hgpu

hpcbench: A set of benchmarking utilities for biomolecular simulation tools

Engineering Supercomputing Platforms for Biomolecular Applications

HPCTransCompile: An AI Compiler Generated Dataset for High-Performance CUDA Transpilation and LLM Preliminary Exploration

HPCTransCompile: An AI Compiler Generated Dataset for High-Performance CUDA Transpilation and LLM Preliminary Exploration

chemtrain: Training Molecular Dynamics Potentials in JAX

chemtrain-deploy: A parallel and scalable framework for machine learning potentials in million-atom MD simulations

microSYCL: SYCL micro-benchmarks repository

Exploring SYCL as a Portability Layer for High-Performance Computing on CPUs

XaaS containers

Acceleration as a Service (XaaS) Source Containers

CASS: Cuda-Amd aSSembly

CASS: Nvidia to AMD Transpilation with Data, Models, and Benchmark

Cluser of smartphones for edge computing application using TensorFlow

Low-cost edge computing using upcycled smartphones

SYCL Container

Exploring SYCL for batched kernels with memory allocations

Efficient Graph Embedding at Scale: Optimizing CPU-GPU-SSD Integration

Efficient Graph Embedding at Scale: Optimizing CPU-GPU-SSD Integration

Can Large Language Models Predict Parallel Code Performance?

Can Large Language Models Predict Parallel Code Performance?

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