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Frame-based parallelization of MPEG-4 on compute unified device architecture (CUDA)

Dishant Ailawadi, Milan Kumar Mohapatra, Ankush Mittal

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Tags: CUDA, Image processing, nVidia, nVidia Quadro FX 370, Video decoding

March 8, 2011 by hgpu

Fast implementation of Wyner-Ziv Video codec using GPGPU

Ryanggeun Oh, Jongbin Park, Byeungwoo Jeon

Tags: CUDA, nVidia, Signal processing, Video decoding

March 7, 2011 by hgpu

Software parallel CAVLC encoder based on stream processing

Ju Ren, Yi He, Wei Wu, Mei Wen, Nan Wu, Chunyuan Zhang

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Tags: Computer science, H.264/AVC, nVidia, nVidia GeForce 8800 GTX, Video decoding

February 2, 2011 by hgpu

Accelerating video decoding using GPU

Guobin Shen,Lihua Zhu,Shipeng Li,Heung-Yeung Shum,Ya-Qin Zhang

Tags: Computer science, nVidia, Video decoding

October 27, 2010 by hgpu

KernelZero: Co-Evolving Proposer and Coder for Continuously Improved GPU Kernel Generation

Introduction to Computer Vision

ACT: Accelerator Compiler Toolkit

Automatically Generating ML Compiler Backends from Tensor Accelerator ISA Descriptions

pytest-gpu-proof: A Simple Pytest Extension for Local GPU Code Testing

pytest-gpu-proof: Enabling Cloud-CPU Continuous Integration for GPU Code with Local GPU Attestation

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

nvsass-disassembler

Automated Instruction Encoding Synthesis for Modern GPU ISA Compression

PrefixBench-H100: Characterizing Prefix Reuse and Time-to-First-Token in H100 LLM Serving

AutoTuneBench: Trustworthy Measurement for Agent Auto-Tuning of LLM Serving Engines

EinsummableV3 - graph-based computation with tensor operations support

Every Kernel Is a Join: Automatic Multi-GPU Parallelism for AI Computations in Einsummable

MaxKernel: Intelligent TPU Kernel Engineering Agents

MaxKernel: Agentic Kernel Generation for TPUs

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