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Posts

Sep, 10

An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform

This paper investigates the feasibility of a backend design for real-time, multiple-channel processing digital phased array system, particularly for high-performance embedded computing platforms constructed of general purpose digital signal processors. First, we obtained the lab-scale backend performance benchmark from simulating beamforming, pulse compression, and Doppler filtering based on a Micro Telecom Computing Architecture (MTCA) chassis […]
Sep, 10

GPU-ArraySort: A parallel, in-place algorithm for sorting large number of arrays

Modern day analytics deals with big datasets from diverse fields. For many application the data is in the form of an array which consists of large number of smaller arrays. Existing techniques focus on sorting a single large array and cannot be used for sorting large number of smaller arrays in an efficient manner. Currently […]
Sep, 10

System Design Principles for Heterogeneous Resource Management and Scheduling in Accelerator-Based Systems

Accelerator-based systems are making rapid inroads into becoming platforms of choice for both high end cloud services and processing irregular applications like real-world graph analytics due to their high scalability and low dollar to FLOPS ratios. Yet GPUs are not first class schedulable entities causing substantial hardware resource underutilization, including their computational and data movement […]
Sep, 10

3D Object Recognition with Convolutional Neural Networks

In this work, we propose the implementation of a 3D object recognition system using Convolutional Neural Networks. For that purpose, we first analyzed the theoretical foundations of that kind of neural networks. Next, we discussed ways of representing 3D data in a compact and structured manner to feed the neural network. Those representations consist of […]
Sep, 10

OpenSBLI: A framework for the automated derivation and parallel execution of finite difference solvers on a range of computer architectures

Exascale computing will feature novel and potentially disruptive hardware architectures. Exploiting these to their full potential is non-trivial. Numerical modelling frameworks involving finite difference methods are currently limited by the ‘static’ nature of the hand-coded discretisation schemes and repeatedly may have to be re-written to run efficiently on new hardware. In contrast, OpenSBLI uses code […]
Sep, 8

Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks

With the recent advancement of multilayer convolutional neural networks (CNN), deep learning has achieved amazing success in many areas, especially in visual content understanding and classification. To improve the performance and energy-efficiency of the computation-demanding CNN, the FPGA-based acceleration emerges as one of the most attractive alternatives. In this paper we design and implement Caffeine, […]
Sep, 8

A Lightweight Approach to Performance Portability with targetDP

Leading HPC systems achieve their status through use of highly parallel devices such as NVIDIA GPUs or Intel Xeon Phi many-core CPUs. The concept of performance portability across such architectures, as well as traditional CPUs, is vital for the application programmer. In this paper we describe targetDP, a lightweight abstraction layer which allows grid-based applications […]
Sep, 8

OpenCL/CUDA algorithms for parallel decoding of any irregular LDPC code using GPU

This article provides a scalable parallel approach of an iterative LDPC decoder, presented in a tutorial-based style. The proposed approach can be implemented in applications supporting massive parallel computing. The proposed mapping is suitable for decoding any irregular LDPC code without the limitation of the maximum node degree. The implementation of the LDPC decoder with […]
Sep, 8

QSL Squasher: A Fast Quasi-Separatrix Layer Map Calculator

Quasi-Separatrix Layers (QSLs) are a useful proxy for the locations where current sheets can develop in the solar corona, and give valuable information about the connectivity in complicated magnetic field configurations. However, calculating QSL maps even for 2-dimensional slices through 3-dimensional models of coronal magnetic fields is a non-trivial task as it usually involves tracing […]
Sep, 8

A Non-linear GPU Thread Map for Triangular Domains

There is a stage in the GPU computing pipeline where a grid of thread-blocks, in parallel space, is mapped onto the problem domain, in data space. Since the parallel space is restricted to a box type geometry, the mapping approach is typically a k-dimensional bounding box (BB) that covers a p-dimensional data space. Threads that […]
Sep, 8

International Conference on Innovation in Artificial Intelligence (ICIAI), 2017

Paper Publication: All accepted papers of ICIAI 2017 will be published in the International Conference Proceedings, which will be indexed by Ei Compendex and Scopus.
Sep, 8

The 7th International Workshop on Computer Science and Engineering (WCSE), 2017

Registered and presented papers of WCSE 2017 will be published into the conference proceedings, which will be indexed by Scopus & Ei compendex.
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