high performance computing on graphics processing units: hgpu.org

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Accelerating Compute-Intensive Applications with GPUs and FPGAs

Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadron, John Lach

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Tags: Architecture, Computer science, CUDA, FPGA, nVidia, nVidia GeForce 8800 GTX, Package, Performance

December 13, 2010 by hgpu

Map-reduce as a Programming Model for Custom Computing Machines

Jackson H. C. Yeung, C. C. Tsang, K. H. Tsoi, Bill S. H. Kwan, Chris C. C. Cheung, Anthony P. C. Chan, Philip H. W. Leong

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Tags: Computer science, CUDA, FPGA, MapReduce, Monte Carlo simulation, nVidia, nVidia GeForce 8800 GTX, Signal processing

December 12, 2010 by hgpu

Stereoscopic Scene Flow Computation for 3D Motion Understanding

Andreas Wedel, Thomas Brox, Tobi Vaudrey, Clemens Rabe, Uwe Franke, Daniel Cremers

Tags: Computer vision, FPGA, Image processing, Image reconstruction, Optical flow

December 9, 2010 by hgpu

FPGA-GPU architecture for kernel SVM pedestrian detection

Sebastian Bauer, Sebastian Kohler, Konrad Doll, Ulrich Brunsmann

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Tags: Computer vision, FPGA, Image processing, nVidia, nVidia GeForce GTX 295

December 9, 2010 by hgpu

Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor

Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham Chinya, Ankur K. Groen, Hong Jiang, Hong Wang

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Tags: Computer science, FPGA, Hardware

December 7, 2010 by hgpu

BLAS Comparison on FPGA, CPU and GPU

Srinidhi Kestur, John D. Davis, Oliver Williams

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Tags: BLAS, Computer science, CUBLAS, CUDA, Energy-efficient computing, FPGA, Linear Algebra, nVidia, nVidia GeForce 9500 GT, Performance, Tesla C1060

December 6, 2010 by hgpu

FPGAs, GPUs and the PS2 – A Single Programming Methodology

Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckmann

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Tags: Computer science, FPGA, nVidia, nVidia GeForce 6800 Ultra

December 2, 2010 by hgpu

Have GPUs made FPGAs redundant in the field of video processing?

B. Cope, P. Y. K. Cheung, W. Luk, S. Witt

Tags: Computer science, FPGA, Image processing

November 29, 2010 by hgpu

Exploring Reconfigurable Architectures for Tree-Based Option Pricing Models

Qiwei Jin, David B. Thomas, Wayne Luk, Benjamin Cope

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Tags: CUDA, Finance, FPGA, nVidia, nVidia GeForce 7900 GTX

November 28, 2010 by hgpu

A Massively Parallel Architecture for Bioinformatics

Gerd Pfeiffer, Stefan Baumgart, Jan Schroder, Manfred Schimmler

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Tags: Algorithms, Bioinformatics, Biology, FPGA, MapReduce

November 27, 2010 by hgpu

Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation

Christopher Claus, Robert Huitl, Joachim Rausch, Walter Stechele

Tags: Computer science, FPGA, nVidia, nVidia GeForce 8800 GTX

November 27, 2010 by hgpu

Novel Computing Architectures

Volodymyr Kindratenko

Tags: Cell processor, Computer science, FPGA, Review

November 25, 2010 by hgpu

Coccinelle: a C code transformation engine using SmPL for matches, refactorings, and bug fixing

Advances in Semantic Patching for HPC-oriented Refactorings with Coccinelle

DuoReduce: MLIR's benchmark

Hardware-Assisted Software Testing and Debugging for Heterogeneous Computing

Shamrock: Multi-GPU hydrodynamics for astrophysics

The Shamrock code: I- Smoothed Particle Hydrodynamics on GPUs

LLMPerf: GPU Performance Modeling meets Large Language Models

Hercules: A Compiler for Productive Programming of Heterogeneous Systems

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high performance computing on graphics processing units: hgpu.org

Accelerating Compute-Intensive Applications with GPUs and FPGAs

Map-reduce as a Programming Model for Custom Computing Machines

Stereoscopic Scene Flow Computation for 3D Motion Understanding

FPGA-GPU architecture for kernel SVM pedestrian detection

Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor

BLAS Comparison on FPGA, CPU and GPU

FPGAs, GPUs and the PS2 – A Single Programming Methodology

Have GPUs made FPGAs redundant in the field of video processing?

Exploring Reconfigurable Architectures for Tree-Based Option Pricing Models

A Massively Parallel Architecture for Bioinformatics

Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation

Novel Computing Architectures

Recent source codes

Coccinelle: a C code transformation engine using SmPL for matches, refactorings, and bug fixing

DuoReduce: MLIR's benchmark

Shamrock: Multi-GPU hydrodynamics for astrophysics

LLMPerf: GPU Performance Modeling meets Large Language Models

Hercules: A Compiler for Productive Programming of Heterogeneous Systems

Celerity Runtime: High-level C++ for Accelerator Clusters

wgpy: WebGL accelerated numpy-compatible array library for web browser

Microbenchmarking OpenMP target offload with Catch2

SUperman: Highly Efficient Permanent Computation Library

TransCL: An Automatic CUDA-to-OpenCL Programs Transformation Framework

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