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A Survey of Techniques for Architecting and Managing GPU Register File

Sparsh Mittal

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Tags: Energy efficiency, GPU, nVidia, Performance, Power, Register file, Reliability, Research, survey

March 22, 2016 by sparsh0mittal

A Computing Kernel for Network Binarization on PyTorch

A Computing Kernel for Network Binarization on PyTorch

Deep Learning Based FPGA-CPU Acceleration

Deep Learning Based FPGA-CPU Acceleration

KTT: Kernel Tuning Toolkit

Framework for Parallel Kernels Auto-tuning

SHA512AOCLStudy

Study of OpenCL Processing Models for FPGA Devices

KLARAPTOR: A Tool for Dynamically Finding Optimal Kernel Launch Parameters Targeting CUDA Programs

KLARAPTOR: A Tool for Dynamically Finding Optimal Kernel Launch Parameters Targeting CUDA Programs

JSDoop

JSDoop and TensorFlow.js: Volunteer Distributed Web Browser-Based Neural Network Training

FPGA CNN Acceleration

Research on OpenCL optimization for FPGA deep learning application

PyTorchPipe: a framework for rapid prototyping of pipelines combining language and vision

PyTorchPipe: a framework for rapid prototyping of pipelines combining language and vision

Performance Evaluation of Advanced Features in CUDA Unified Memory

Performance Evaluation of Advanced Features in CUDA Unified Memory

SneakySnake: A Fast and Accurate Universal Genome Pre-Alignment Filter for CPUs, GPUs, and FPGAs

SneakySnake: A Fast and Accurate Universal Genome Pre-Alignment Filter for CPUs, GPUs, and FPGAs

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2020

April

27-29

Munich, Germany

8th International Workshop on OpenCL, including SYCLCon, 2019

2019

May

13-15

Boston, USA

7th International Workshop on OpenCL, 2019

2019

May

13

Boston, MA, USA

Distributed Heterogeneous Programming in C/C++ (DHPCC++), 2019

2019

May

14

Larnaca, Cyprus

3rd International Workshop on Theoretical Approaches to Performance Evaluation, Modeling and Simulation (TAPEMS), 2019

2019

July

26-28

Rome, Italy

International Conference on Frontiers of Neural Networks (ICFNN), 2019

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