high performance computing on graphics processing units: hgpu.org

hgpu.org » Memory model

Compiler-directed memory management for heterogeneous MPSoCs

Miao Wang, Francois Bodin

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Tags: Cell processor, Computer science, Heterogeneous systems, Memory, Memory model, Optimization

September 7, 2011 by hgpu

Elastic pipeline: addressing GPU on-chip shared memory bank conflicts

Chunyang Gou, Georgi N. Gaydadjiev

Tags: Computer science, Memory, Memory model, Performance

August 24, 2011 by hgpu

The Sharing Tracker: Using Ideas from Cache Coherence Hardware to Reduce Off-Chip Memory Traffic with Non-Coherent Caches

David Tarjan, Kevin Skadron

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Tags: Computer science, Memory, Memory model

August 12, 2011 by hgpu

Exploiting SPMD Horizontal Locality

Chunyang Gou, Georgi Gaydadjiev

Tags: Computer science, Memory, Memory model

June 22, 2011 by hgpu

Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures

Byunghyun Jang, Dana Schaa, Perhaad Mistry, David Kaeli

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Tags: ATI, ATI Radeon HD 3870, Brook, Computer science, CUDA, Data parallelism, Memory model, nVidia, nVidia GeForce GTX 285, Review

June 17, 2011 by hgpu

A Memory Centric Kernel Framework for Accelerating Short-Range, Interactive Particle Simulation

Ian Stewart, Shujia Zhou

Tags: Cell processor, Computer science, Memory model, nVidia

June 17, 2011 by hgpu

Memory-efficient implementation of a graphics processor-based cluster detection algorithm for large spatial databases

R.J. Thapa, C. Trefftz, G. Wolffe

Tags: Algorithms, Computer science, Databases, Memory model

June 14, 2011 by hgpu

Exploiting Computing Power on Graphics Processing Unit

Ziyi Liu, Wenjing Ma

Tags: Algorithms, Computer science, CUDA, Memory model, nVidia, Performance

June 5, 2011 by hgpu

GPU-based time parallel cache simulator

Junjie Ma, Han Wan, Xiaopeng Gao, Xiang Long

Tags: Algorithms, Computer science, CUDA, Memory, Memory model, nVidia

May 9, 2011 by hgpu

Model-T: Rethinking the OS for terabit speeds

Willem de Bruijn, Herbert Bos

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Tags: Computer science, Memory model, Networks, nVidia, nVidia GeForce 8800 Ultra

April 26, 2011 by hgpu

Design and implementation of software-managed caches for multicores with local memory

Sangmin Seo, Jaejin Lee, Zehra Sura

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Tags: Cell processor, Computer science, Memory model, OpenMP

April 20, 2011 by hgpu

A Task-centric Memory Model for Scalable Accelerator Architectures

John H. Kelm, Daniel R. Johnson, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel

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Tags: Algorithms, Computer science, Hardware Architecture, Memory model

April 19, 2011 by hgpu

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Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark

MapReduce for Counting Word Frequencies with MPI and GPUs

CoDL: Efficient CPU-GPU Co-execution for Deep Learning Inference on Mobile Devices

SYCLCOMP Utilities

On the Compilation Performance of Current SYCL Implementations

M1 GPUs for (scientific) computations in C++

Seamless GPU acceleration for C++ based physics with the Metal Shading Language on Apple’s M series unified chips

CUB: Cooperative primitives for CUDA C++

Onesweep: A Faster Least Significant Digit Radix Sort for GPUs

Simulator and workload generator for Edge-to-Cloud environments

FELARE: Fair Scheduling of Machine Learning Applications on Heterogeneous Edge Systems

See all packages

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high performance computing on graphics processing units: hgpu.org

Compiler-directed memory management for heterogeneous MPSoCs

Elastic pipeline: addressing GPU on-chip shared memory bank conflicts

The Sharing Tracker: Using Ideas from Cache Coherence Hardware to Reduce Off-Chip Memory Traffic with Non-Coherent Caches

Exploiting SPMD Horizontal Locality

Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures

A Memory Centric Kernel Framework for Accelerating Short-Range, Interactive Particle Simulation

Memory-efficient implementation of a graphics processor-based cluster detection algorithm for large spatial databases

Exploiting Computing Power on Graphics Processing Unit

GPU-based time parallel cache simulator

Model-T: Rethinking the OS for terabit speeds

Design and implementation of software-managed caches for multicores with local memory

A Task-centric Memory Model for Scalable Accelerator Architectures

Recent source codes

Rodinia Benchmarks for DPC++

DCA++: a state of the art implementation of the dynamical cluster approximation

tntorch - Tensor Network Learning with PyTorch

Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark

MapReduce for Counting Word Frequencies with MPI and GPUs

CoDL: Efficient CPU-GPU Co-execution for Deep Learning Inference on Mobile Devices

SYCLCOMP Utilities

M1 GPUs for (scientific) computations in C++

CUB: Cooperative primitives for CUDA C++

Simulator and workload generator for Edge-to-Cloud environments

Most viewed papers (last 30 days)