high performance computing on graphics processing units: hgpu.org

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A Multi-Stage CUDA Kernel for Floyd-Warshall

Ben Lund, Justin W Smith

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Tags: Computer science, CUDA, nVidia, Optimization, Performance, Programming techniques, Tesla C1060

January 18, 2011 by hgpu

Fast GPGPU Data Rearrangement Kernels using CUDA

Michael Bader, Hans-Joachim Bungartz, Dheevatsa Mudigere, Srihari Narasimhan, Babu Narayanan

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Tags: Computer science, CUDA, Data Structures and Algorithms, nVidia, Performance, Tesla C1060

January 18, 2011 by hgpu

Understanding the design trade-offs among current multicore systems for numerical computations

Seunghwa Kang, David A. Bader, Richard W. Vuduc

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Tags: Cell processor, Computer science, CUDA, nVidia, Performance, Tesla C1060

January 11, 2011 by hgpu

An events based algorithm for distributing concurrent tasks on multi-core architectures

David W. Holmes, John R. Williams, Peter Tilke

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Tags: Algorithms, Computer science, Performance, Task scheduling

January 11, 2011 by hgpu

Diagnosis, Tuning, and Redesign for Multicore Performance: A Case Study of the Fast Multipole Method

Aparna Chandramowlishwarany, Kamesh Madduri, Richard Vuduc

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Tags: Computer science, Fast multipole method, Optimization, Performance

January 11, 2011 by hgpu

High-performance CUDA kernel execution on FPGAs

Alexandros Papakonstantinou, Karthik Gururaj, John A. Stratton, Deming Chen, Jason Cong, Wen Mei

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Tags: Computer science, CUDA, FPGA, Performance, Programming techniques

January 11, 2011 by hgpu

Comparing Hardware Accelerators in Scientific Applications: A Case Study

Rick Weber, Akila Gothandaraman, Robert J. Hinde, Gregory D. Peterson

Tags: ATI, Brook, Computer science, CUDA, FPGA, nVidia, OpenCL, Performance

January 10, 2011 by hgpu

Self-Configuring Applications for Heterogeneous Systems: Program Composition and Optimization Using Cognitive Techniques

M. W. Hall, Y. Gil, R. F. Lucas

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Tags: Compilers, Computer science, FPGA, nVidia, Optimization, Performance

January 8, 2011 by hgpu

FPGA-based acceleration of CHARMM-potential minimization

Bharat Sukhwani, Martin C. Herbordt

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Tags: Chemistry, FPGA, Molecular modeling, nVidia, Performance, Tesla C1060

January 3, 2011 by hgpu

Using Reconfigurable Logic to Optimise GPU Memory Accesses

Ben Cope, Peter Y. K. Cheung, Wayne Luk

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Tags: Computer science, Memory model, nVidia, nVidia GeForce 7900 GTX, Performance

December 27, 2010 by hgpu

Performance analysis of memory transfers and GEMM subroutines on NVIDIA Tesla GPU cluster

Veerendra Allada, Troy Benjegerdes, Brett Bode

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Tags: Computer science, CUDA, GPU cluster, nVidia, Performance, Presentation, Tesla S1070, Tesla T10

December 27, 2010 by hgpu

Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors

Nachiket Kapre, Andre DeHon

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Tags: Cell processor, Computer science, CUDA, FPGA, nVidia, nVidia GeForce 9600 GT, Performance

December 26, 2010 by hgpu

Efficient Graph Embedding at Scale: Optimizing CPU-GPU-SSD Integration

Can Large Language Models Predict Parallel Code Performance?

PELSI: Power-Efficient Layer-Switched Inference

Efficient deep learning inference on end devices

Ouroboros: Virtualized Queues for dynamic memory management

Dynamic Memory Management on GPUs with SYCL

MSCCL++: A GPU-driven communication stack for scalable AI applications

MSCCL++: Rethinking GPU Communication Abstractions for Cutting-edge AI Applications

Benchmark compute shader of Unity against InteropUnityCUDA

InteropUnityCUDA: A Tool for Interoperability Between Unity and CUDA

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high performance computing on graphics processing units: hgpu.org

A Multi-Stage CUDA Kernel for Floyd-Warshall

Fast GPGPU Data Rearrangement Kernels using CUDA

Understanding the design trade-offs among current multicore systems for numerical computations

An events based algorithm for distributing concurrent tasks on multi-core architectures

Diagnosis, Tuning, and Redesign for Multicore Performance: A Case Study of the Fast Multipole Method

High-performance CUDA kernel execution on FPGAs

Comparing Hardware Accelerators in Scientific Applications: A Case Study

Self-Configuring Applications for Heterogeneous Systems: Program Composition and Optimization Using Cognitive Techniques

FPGA-based acceleration of CHARMM-potential minimization

Using Reconfigurable Logic to Optimise GPU Memory Accesses

Performance analysis of memory transfers and GEMM subroutines on NVIDIA Tesla GPU cluster

Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors

Recent source codes

SYCL Container

CASS: Cuda-Amd aSSembly

Cluser of smartphones for edge computing application using TensorFlow

CFAL-bench

Efficient Graph Embedding at Scale: Optimizing CPU-GPU-SSD Integration

Can Large Language Models Predict Parallel Code Performance?

PELSI: Power-Efficient Layer-Switched Inference

Ouroboros: Virtualized Queues for dynamic memory management

MSCCL++: A GPU-driven communication stack for scalable AI applications

Benchmark compute shader of Unity against InteropUnityCUDA

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