high performance computing on graphics processing units: hgpu.org

Tomoyoshi Shimobaba, Jian Tong Weng, Takahiro Sakurai, Naohisa Okada, Takashi Nishitsuji, Naoki Takada, Atsushi Shiraki, Nobuyuki Masuda, Tomoyoshi Ito

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Tags: Computational Physics, CUDA, nVidia, nVidia GeForce GTX 295, nVidia GeForce GTX 460, nVidia GeForce GTX 580, Optics, Physics

July 29, 2011 by hgpu

FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks

David B. Thomas, Wayne Luk

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Tags: Computer science, CUDA, FPGA, Neural networks, nVidia, nVidia GeForce GT 200, Performance

July 29, 2011 by hgpu

torchPDLP: Primal-Dual Linear Programming in PyTorch. In collaboration with AMD and IPAM

Accelerating a Linear Programming Algorithm on AMD GPUs

Benchmarks for Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

kvcached: Elastic KV cache for dynamic GPU sharing and efficient multi-LLM inference

Towards Efficient and Practical GPU Multitasking in the Era of LLM

Bandicoot: C++ library for GPU accelerated linear algebra

Bandicoot: A Templated C++ Library for GPU Linear Algebra

Luthier: Bridging Auto-Tuning and Vendor Libraries for Efficient Deep Learning Inference

Fused Kernel Library (FKL)

The Fused Kernel Library: A C++ API to Develop Highly-Efficient GPU Libraries

GPUHammer: Rowhammer Attacks on GPU Memories are Practical

Block: Balance Loader of LLM Serving with Context, Knowledge and Predictive Scheduling

Block: Balancing Load in LLM Serving with Context, Knowledge and Predictive Scheduling

SIGMo: Scalable Isomorphism Graph Matching on GPUs

SIGMo: High-Throughput Batched Subgraph Isomorphism on GPUs for Molecular Matching

DGEMM without FP64 Arithmetic - using FP64 Emulation and FP8 Tensor Cores with Ozaki Scheme

DGEMM without FP64 Arithmetic – using FP64 Emulation and FP8 Tensor Cores with Ozaki Scheme

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high performance computing on graphics processing units: hgpu.org

Exploring reconfigurable architectures for explicit finite difference option pricing models

A fast hybrid time-synchronous/event approach to parallel discrete event simulation of queuing networks

Programming finite-difference time-domain for graphics processor units using compute unified device architecture

Multi-scale modeling of nano scale phenomenon using CUDA based HPC setup

Performance Debugging of GPGPU Applications with the Divergence Map

Adaptive, real-time visual simultaneous localization and mapping

Blind image deconvolution algorithm on NVIDIA CUDA platform

STREAMIT: Dynamic visualization and interactive exploration of text streams

Power-efficient medical image processing using PUMA

A parallel accelerator for semantic search

Computational wave optics library for C++: CWO++ library