high performance computing on graphics processing units: hgpu.org

Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Francesca Lo Cicero, Pier Stanislao Paolucci, Alessandro Lonardo, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini

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Tags: Computer science, FPGA, GPU cluster, Hardware Architecture, nVidia

November 8, 2013 by hgpu

Exploring Microcontrollers in GPUs

Yusuke Fujii, Takuya Azumi, Nobuhiko Nishio, Shinpei Kato

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Tags: Computer science, CUDA, Hardware Architecture, nVidia, nVidia GeForce GTX 480

August 7, 2013 by hgpu

SIMD Divergence Optimization through Intra-Warp Compaction

Aniruddha S. Vaidya, Anahita Shayesteh, Dong Hyuk Woo, Roy Saharoy, Mani Azimi

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Tags: Computer science, Hardware Architecture, OpenCL, OpenGL, Performance

July 12, 2013 by hgpu

Cost-Effective Soft-Error Protection for SRAM-Based Structures in GPGPUs

Jingweijia Tan, Zhi Li, Xin Fu

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Tags: Computer science, CUDA, Energy-efficient computing, Hardware Architecture, nVidia

June 13, 2013 by hgpu

Performance Evaluation of Sparse Matrix Multiplication Kernels on Intel Xeon Phi

Erik Saule, Kamer Kaya, Umit V. Catalyurek

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Tags: Computer science, CUDA, Hardware Architecture, Intel, Intel Phi, Matrix multiplication, nVidia, Performance, Sparse matrix, Tesla C2050, Tesla K20

February 6, 2013 by hgpu

Coccinelle: a C code transformation engine using SmPL for matches, refactorings, and bug fixing

Advances in Semantic Patching for HPC-oriented Refactorings with Coccinelle

DuoReduce: MLIR's benchmark

Hardware-Assisted Software Testing and Debugging for Heterogeneous Computing

Shamrock: Multi-GPU hydrodynamics for astrophysics

The Shamrock code: I- Smoothed Particle Hydrodynamics on GPUs

LLMPerf: GPU Performance Modeling meets Large Language Models

Hercules: A Compiler for Productive Programming of Heterogeneous Systems

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high performance computing on graphics processing units: hgpu.org

Architectural Support for Virtual Memory in GPUs

A Survey of Methods For Analyzing and Improving GPU Energy Efficiency

Precision-Aware Soft Error Protection for GPUs

A Scalable Multi-Path Microarchitecture for Efficient GPU Control Flow

A Detailed GPU Cache Model Based on Reuse Distance Theory

Performance-Correctness Challenges in Emerging Heterogeneous Multicore Processors

Supporting x86-64 Address Translation for 100s of GPU Lanes

Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems

Exploring Microcontrollers in GPUs

SIMD Divergence Optimization through Intra-Warp Compaction

Cost-Effective Soft-Error Protection for SRAM-Based Structures in GPGPUs

Performance Evaluation of Sparse Matrix Multiplication Kernels on Intel Xeon Phi

Recent source codes

Coccinelle: a C code transformation engine using SmPL for matches, refactorings, and bug fixing

DuoReduce: MLIR's benchmark

Shamrock: Multi-GPU hydrodynamics for astrophysics

LLMPerf: GPU Performance Modeling meets Large Language Models

Hercules: A Compiler for Productive Programming of Heterogeneous Systems

Celerity Runtime: High-level C++ for Accelerator Clusters

wgpy: WebGL accelerated numpy-compatible array library for web browser

Microbenchmarking OpenMP target offload with Catch2

SUperman: Highly Efficient Permanent Computation Library

TransCL: An Automatic CUDA-to-OpenCL Programs Transformation Framework

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