high performance computing on graphics processing units: hgpu.org

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On a Simplified Approach to Achieve Parallel Performance and Portability Across CPU and GPU Architectures

Nathaniel Morgan, Caleb Yenusah, Adrian Diaz, Daniel Dunning,Jacob Moore,Erin Heilman, Calvin Roth, Evan Lieberman, Steven Walton, Sarah Brown, Daniel Holladay, Marko Knezevic, Gavin Whetstone, Zachary Baker, Robert Robey

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Tags: Computer science, CUDA, Fortran, HIP, nVidia, Package, performance portability, Pthreads

November 10, 2024 by hgpu

Testing GPU Numerics: Finding Numerical Differences Between NVIDIA and AMD GPUs

Anwar Hossain Zahid, Ignacio Laguna, Wei Le

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Tags: AMD Radeon Instinct MI250, ATI, Computer science, CUDA, HIP, Numerical Analysis, nVidia, nVidia V100, Programming Languages

October 20, 2024 by hgpu

Understanding Data Movement in AMD Multi-GPU Systems with Infinity Fabric

Gabin Schieffer, Ruimin Shi, Stefano Markidis, Andreas Herten, Jennifer Faj, Ivy Peng

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Tags: AMD, AMD Radeon Instinct MI250X, ATI, Computer science, HIP, Machine learning, Memory, Performance

October 6, 2024 by hgpu

Event-Based OpenMP Tasks for Time-Sensitive GPU-Accelerated Systems

Cyril Cetre, Chenle Yu, Sara Royuela, Rémi Barrere, Eduardo Quiñones, Damien Gratadour

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Tags: AMD Radeon Instinct MI100, ATI, Computer science, CUDA, HIP, HPC, nVidia, nVidia A100, Performance

October 6, 2024 by hgpu

HiCCL: A Hierarchical Collective Communication Library

Mert Hidayetoglu, Simon Garcia de Gonzalo, Elliott Slaughter, Pinku Surana, Wen-mei Hwu, William Gropp, Alex Aiken

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Tags: AMD Radeon Instinct MI250X, ATI, Computer science, CUDA, HIP, nVidia, nVidia A100, Package, Performance, SYCL

August 18, 2024 by hgpu

HIPRT: A Ray Tracing Framework in HIP

Daniel Meister, Paritosh Kulkarni, Aaryaman Vasishta, Takahiro Harada

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Tags: 3D Graphics and Realism, AMD Radeon Pro W7900, ATI, HIP, Package, Raytracing, Rendering, Vulkan

August 14, 2024 by hgpu

Evaluating Operators in Deep Neural Networks for Improving Performance Portability of SYCL

Zheming Jin

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Tags: Benchmarking, Computer science, CUDA, HIP, Machine learning, Neural networks, nVidia, nVidia GeForce RTX 2080, nVidia GeForce RTX 3090, nVidia H100, oneAPI, Performance, performance portability, SYCL, Tesla A100, Tesla V100

August 14, 2024 by hgpu

A Comparison of OpenCL, CUDA, and HIP as Compilation Targets for a Functional Array Language

Troels Henriksen

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Tags: AMD Radeon Instinct MI100, ATI, Code generation, Computer science, CUDA, HIP, nVidia, nVidia A100, OpenCL, Package, Programming Languages

July 28, 2024 by hgpu

Bringing Auto-tuning to HIP: Analysis of Tuning Impact and Difficulty on AMD and Nvidia GPUs

Milo Lurati, Stijn Heldens, Alessio Sclocco, Ben van Werkhoven

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Tags: AMD Radeon Instinct MI250X, AMD Radeon Pro W6600, ATI, Computer science, CUDA, HIP, nVidia, nVidia A100, nVidia RTX A4000, Package, Performance, Python

July 28, 2024 by hgpu

Automatic Code Rewriting for Performance Portability

Alister Johnson

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Tags: Compilers, Computer science, HIP, OpenCL, OpenMP, performance portability, SYCL, Thesis

July 7, 2024 by hgpu

Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies

Johannes Pekkilä, Oskar Lappi, Fredrik Robertsén, Maarit J. Korpi-Lagg

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Tags: AMD Radeon Instinct MI100, AMD Radeon Instinct MI250X, ATI, Computer science, CUDA, Energy-efficient computing, HIP, nVidia, nVidia A100, nVidia V100, Package, Performance, PyTorch, Stencil computation

June 16, 2024 by hgpu

CuPBoP: Making CUDA a Portable Language

Ruobing Han, Jun Chen, Bhanu Garg, Xule Zhou, John Lu, Jeffrey Young, Jaewoong Sim, Hyesoon Kim

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Tags: Computer science, CUDA, HIP, nVidia, nVidia A30, OpenCL, Package, Portability, SYCL

May 12, 2024 by hgpu

ParaCodex: A Profiling-Guided Autonomous Coding Agent for Reliable Parallel Code Generation and Translation

SeedFold: Scaling Biomolecular Structure Prediction

Tilus: A Tile-Level GPU Kernel Programming Language

Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computation

Memory-Efficient Acceleration of Block Low-Rank Foundation Models on Resource Constrained GPUs

BoltzGen:Toward Universal Binder Design

CUDA-L2: Surpassing cuBLAS Performance for Matrix Multiplication through Reinforcement Learning

cuPilot: A Strategy-Coordinated Multi-agent Framework for CUDA Kernel Evolution

MATLAB Tensor Core models

Accurate Models of NVIDIA Tensor Cores

TritonForge: Transform PyTorch Operations into Optimized GPU Kernels with LLMs

TritonForge: Profiling-Guided Framework for Automated Triton Kernel Optimization

RLTune: Hybrid Learning and Optimization-Based Dynamic Scheduling for DL Workloads on Heterogeneous GPU Clusters

Hybrid Learning and Optimization-Based Dynamic Scheduling for DL Workloads on Heterogeneous GPU Clusters

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high performance computing on graphics processing units: hgpu.org

On a Simplified Approach to Achieve Parallel Performance and Portability Across CPU and GPU Architectures

Testing GPU Numerics: Finding Numerical Differences Between NVIDIA and AMD GPUs

Understanding Data Movement in AMD Multi-GPU Systems with Infinity Fabric

Event-Based OpenMP Tasks for Time-Sensitive GPU-Accelerated Systems

HiCCL: A Hierarchical Collective Communication Library

HIPRT: A Ray Tracing Framework in HIP

Evaluating Operators in Deep Neural Networks for Improving Performance Portability of SYCL

A Comparison of OpenCL, CUDA, and HIP as Compilation Targets for a Functional Array Language

Bringing Auto-tuning to HIP: Analysis of Tuning Impact and Difficulty on AMD and Nvidia GPUs

Automatic Code Rewriting for Performance Portability

Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies

CuPBoP: Making CUDA a Portable Language

Recent source codes

ParaCodex: A Profiling-Guided Autonomous Coding Agent for Reliable Parallel Code Generation and Translation

SeedFold: Scaling Biomolecular Structure Prediction

Tilus: A Tile-Level GPU Kernel Programming Language

Memory-Efficient Acceleration of Block Low-Rank Foundation Models on Resource Constrained GPUs

BoltzGen:Toward Universal Binder Design

CUDA-L2: Surpassing cuBLAS Performance for Matrix Multiplication through Reinforcement Learning

cuPilot: A Strategy-Coordinated Multi-agent Framework for CUDA Kernel Evolution

MATLAB Tensor Core models

TritonForge: Transform PyTorch Operations into Optimized GPU Kernels with LLMs

RLTune: Hybrid Learning and Optimization-Based Dynamic Scheduling for DL Workloads on Heterogeneous GPU Clusters

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