Posts
Jul, 1
CAMPAIGN: An open-source Library of GPU-accelerated Data Clustering Algorithms
MOTIVATION: Data clustering techniques are an essential component of a good data analysis toolbox. Many current bioinformatics applications are inherently compute-intense and work with very large data sets. Sequential algorithms are inadequate for providing the necessary performance. For this reason, we have created CAMPAIGN, a central resource for data clustering algorithms and tools that are […]
Jul, 1
Unified Parallel C for GPU Clusters: Language Extensions and Compiler Implementation
Unified Parallel C (UPC), a parallel extension to ANSI C, is designed for high performance computing on large-scale parallel machines. With General-purpose graphics processing units (GPUs) becoming an increasingly important high performance computing platform, we propose new language extensions to UPC to take advantage of GPU clusters. We extend UPC with hierarchical data distribution, revise […]
Jul, 1
EASEA: specification and execution of evolutionary algorithms on GPGPU
EASEA is a framework designed to help non-expert programmers to optimize their problems by evolutionary computation. It allows to generate code targeted for standard CPU architectures, GPGPU-equipped machines as well as distributed memory clusters. In this paper, EASEA is presented by its underlying algorithms and by some example problems. Achievable speedups are also shown onto […]
Jul, 1
Computing trends using graphic processor in high energy physics
One of the main challenges in Heavy Energy Physics is to make fast analysis of high amount of experimental and simulated data. At LHC-CERN one p-p event is approximate 1 Mb in size. The time taken to analyze the data and obtain fast results depends on high computational power. The main advantage of using GPU(Graphic […]
Jun, 30
On the technology roadmap of Free-Viewpoint 3DTV receivers
This paper presents the architecture of an innovative 3DTV receiver system, enabling Free-ViewPoint (FVP) interpolation and rendering functionality. We outline the hardware architecture of the receiver, and specify how the design decisions address the extremely high processing requirements of the system. Based on the experience and quantitative data obtained during the receiver prototyping, we present […]
Jun, 30
Fast variational static IR-drop analysis on the graphical processing unit
Due to large power grid sizes, IR-drop analysis is a computationally challenging design flow step that is commonly used in integrated circuit design. Variability in silicon and circuit operating conditions makes IR-drop analysis even more challenging. We introduce a flow to take benefit of a graphical processing unit (GPU). We introduce variability for the power […]
Jun, 30
Dynamic adaptation of broad phase collision detection algorithms
In this paper we present a new technique to dynamically adapt the first step (broad phase) of the collision detection process on hardware architecture during simulation. Our approach enables to face the unpredictable evolution of the simulation scenario (this includes addition of complex objects, deletion, split into several objects, …). Our technique of dynamic adaptation […]
Jun, 30
Exploiting Graphic Processing Units Parallelism to Improve Intelligent Data Acquisition System Performance in JET’s Correlation Reflectometer
The performance of intelligent data acquisition systems relies heavily on their processing capabilities and local bus bandwidth, especially in applications with high sample rates or high number of channels. This is the case of the self adaptive sampling rate data acquisition system installed as a pilot experiment in KG8B correlation reflectometer at JET. The system, […]
Jun, 30
High Resolution Program Flow Visualization of Hardware Accelerated Hybrid Multi-core Applications
The advent of multi-core processors has made parallel computing techniques mandatory on main stream systems. With the recent rise of hardware accelerators, hybrid parallelism adds yet another dimension of complexity to the process of software development. This article presents a tool for graphical program flow analysis of hardware accelerated parallel programs. It monitors the hybrid […]
Jun, 30
Overview of approaches for accelerating scale invariant feature detection algorithm
SIFT (Scale Invariant Feature Transform) is one of most popular approach for feature detection and matching. Many parallelized algorithms have been proposed to accelerate SIFT to apply into real-time systems. This paper divides the researches into three different categories, that is, optimizing parallel algorithms based on general purpose multi-core processors, designing customized multi-core processor dedicated […]
Jun, 30
Parallelized Physical Optics computations for Scattering Center Models in radio channel simulations
Scattering Center Models (SCMs) are an approach to efficiently characterize electromagnetic scattering of complex shaped objects in terms of a distribution of equivalent sources. SCMs have been widely used in the area of radar target modeling, particularly for object characterization and classification. Recently, the SCM approach has been adapted to model the electromagnetic properties of […]
Jun, 30
A Hybrid Computing Platform Digital Wideband Receiver Design and Performance Measurement
As a modern radar receiver must rapidly search a large frequency range with maximum sensitivity, capabilities such as high instantaneous dynamic range (IDR), good multiple-signal-detection capability, wider bandwidth (BW), and high-frequency resolution are indispensable. Many techniques proposed to improve digital wideband receiver performance are computationally intensive and limit their real-time performance due to hardware constraint. […]
