high performance computing on graphics processing units: hgpu.org

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Discrete-event Execution Alternatives on General Purpose Graphical Processing Units (GPGPUs)

Kalyan S. Perumalla

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Tags: Brook, Computer science, Diffusion equation, DirectX, Hardware Architecture, nVidia, nVidia GeForce 6800

April 20, 2011 by hgpu

A Hybrid Analytical DRAM Performance Model

George L. Yuan, Tor M. Aamodt

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Tags: Computer science, CUDA, Hardware Architecture, Memory, nVidia

April 19, 2011 by hgpu

Extending the Scalability of Single Chip Stream Processors with On-chip Caches

Ali Bakhoda, Tor M. Aamodt

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Tags: ATI, Computer science, Hardware Architecture, Memory, nVidia

April 19, 2011 by hgpu

A Task-centric Memory Model for Scalable Accelerator Architectures

John H. Kelm, Daniel R. Johnson, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel

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Tags: Algorithms, Computer science, Hardware Architecture, Memory model

April 19, 2011 by hgpu

Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware

Wilson W. L. Fung, Ivan Sham, George Yuan, Tor M. Aamodt

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Tags: Computer science, CUDA, Hardware Architecture, nVidia, nVidia GeForce 8800 GTX, Performance, Warp level parallelism

April 19, 2011 by hgpu

Dynamic detection of uniform and affine vectors in GPGPU computations

Sylvain Collange, David Defour, Yao Zhang

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Tags: Algorithms, Computer science, CUDA, Hardware Architecture, nVidia, Optimization, Tesla

April 19, 2011 by hgpu

High-Speed Implementations of Block Cipher ARIA Using Graphics Processing Units

Yongjin Yeom, Yongkuk Cho, Moti Yung

Tags: Block Ciphers, Computer science, CUDA, Hardware Architecture, nVidia, nVidia GeForce 8800 GTS, OpenGL, Security

April 8, 2011 by hgpu

Expanding the boundaries of GPU computing

Dell Power Solutions

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Tags: Computer science, CUDA, Hardware Architecture, nVidia, Review, Tesla M1060, Tesla M2050, Tesla M2070

March 14, 2011 by hgpu

A Quantitative Performance Analysis Model for GPU Architectures

Yao Zhang, John D. Owens

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Tags: Computer science, CUDA, Hardware Architecture, Linear Algebra, nVidia, nVidia GeForce GTX 285, Optimization

March 13, 2011 by hgpu

A Predictive Shutdown Technique for GPU Shader Processors

Po-Han Wang, Yen-Ming Chen, Chia-Lin Yang, Yu-Jung Cheng

Tags: Computer science, Energy-efficient computing, Hardware Architecture

March 10, 2011 by hgpu

Architecting graphics processors for non-graphics compute acceleration

Tor M. Aamodt

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Tags: Computer science, Hardware Architecture, nVidia, Review

February 20, 2011 by hgpu

Design Space Exploration for GPU-Based Architecture

Zhenyu Ye

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Tags: Computer science, CUDA, Factorization, Hardware Architecture, Memory model, nVidia, nVidia GeForce 8800 GTX, Review, Thesis

February 20, 2011 by hgpu

NVIDIA Nemotron Parse 1.1

ThunderKittens: Tile primitives for speedy kernels

ParallelKittens: Systematic and Practical Simplification of Multi-GPU AI Kernels

Iris: AMD RAD's multi-GPU Triton-based framework for seamless multi-GPU programming

Iris: First-Class Multi-GPU Programming Experience in Triton

HipKittens: Fast and Furious AMD Kernels

CudaForge: An Agent Framework with Hardware Feedback for CUDA Kernel Optimization

pplx-garden: Perplexity open source garden for inference technology

RDMA Point-to-Point Communication for LLM Systems

LC Framework

Characterizing the Performance of Parallel Data-Compression Algorithms across Compilers and GPUs

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high performance computing on graphics processing units: hgpu.org

Discrete-event Execution Alternatives on General Purpose Graphical Processing Units (GPGPUs)

A Hybrid Analytical DRAM Performance Model

Extending the Scalability of Single Chip Stream Processors with On-chip Caches

A Task-centric Memory Model for Scalable Accelerator Architectures

Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware

Dynamic detection of uniform and affine vectors in GPGPU computations

High-Speed Implementations of Block Cipher ARIA Using Graphics Processing Units

Expanding the boundaries of GPU computing

A Quantitative Performance Analysis Model for GPU Architectures

A Predictive Shutdown Technique for GPU Shader Processors

Architecting graphics processors for non-graphics compute acceleration

Design Space Exploration for GPU-Based Architecture

Recent source codes

NVIDIA Nemotron Parse 1.1

ThunderKittens: Tile primitives for speedy kernels

Iris: AMD RAD's multi-GPU Triton-based framework for seamless multi-GPU programming

HipKittens: Fast and Furious AMD Kernels

Fortran xDSL dialects

mt4g: Memory Topology 4 GPUs

Falcon: GPU-Based Floating-point Adaptive Lossless Compression

CudaForge: An Agent Framework with Hardware Feedback for CUDA Kernel Optimization

pplx-garden: Perplexity open source garden for inference technology

LC Framework

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