high performance computing on graphics processing units: hgpu.org

hgpu.org » Hardware Architecture

The GeForce 6800

J. Montrym, H. Moreton

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Tags: Computer science, Hardware Architecture, nVidia, nVidia GeForce 6800, Rendering

July 11, 2011 by hgpu

Introducing Energy Efficiency into Graphics Processors

B. V. N. Silpa, Preeti Ranjan Panda

Tags: Computer science, Energy-efficient computing, Hardware Architecture

July 7, 2011 by hgpu

Energy-saving techniques for low-power graphics processing unit

Chia-Ming Chang, Shao-Yi Chien, You-Ming Tsao, Chih-Hao Sun, Ka-Hang Lok, Yu-Jung Cheng

Tags: Computer science, Energy-efficient computing, Hardware Architecture

July 4, 2011 by hgpu

An Embedded Stream Processor Core Based on Logarithmic Arithmetic for a Low-Power 3-D Graphics SoC

Byeong-Gyu Nam, Hoi-Jun Yoo

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Tags: Computer science, Hardware Architecture, OpenGL

July 3, 2011 by hgpu

A comparative benchmarking of the FFT on Fermi and Evergreen GPUs

M.F. Ahmed, O. Haridy

Tags: ATI, ATI Radeon HD 5870, Benchmarking, Computer science, FFT, Hardware Architecture, nVidia, nVidia GeForce GTX 480, Performance

June 30, 2011 by hgpu

Design and implementation of a time-division multiplexing scan architecture using serializer and deserializer in GPU chips

Amit Sanghani, Bo Yang, Karthikeyan Natarajan, Chunsheng Liu

Tags: Computer science, Electronic design automation, Hardware Architecture, nVidia

June 24, 2011 by hgpu

Design of a fully programmable shader processor for low power mobile devices

Woo-Young Kim, Bo-Haeng Lee, Kwang-Yeob Lee, Jae-Chang Kwak

Tags: Computer science, Hardware Architecture, OpenGL

June 19, 2011 by hgpu

A low-power integrated x86-64 and graphics processor for mobile computing devices

S.R. Gutta, D. Foley, A. Naini, R. Wasmuth, D. Cherepacha

Tags: Computer science, Hardware Architecture

June 15, 2011 by hgpu

Xbox 360 System Architecture

Jeff Andrews, Nick Baker

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Tags: Computer science, Hardware Architecture, Xbox 360

June 15, 2011 by hgpu

A GPU/CUDA implementation of the collection-diffusion model to compute SER of large area and complex circuits

J.L. Autran, S. Uznanski, S. Martinie, P. Roche, G. Gasiot, D. Munteanu

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Tags: Computer science, CUDA, Fault simulation, Hardware Architecture, Memory, nVidia, Physics, Tesla C1060

June 1, 2011 by hgpu

Distributed time, conservative parallel logic simulation on GPUs

Bo Wang, Yuhao Zhu, Yangdong Deng

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Tags: Computer science, CUDA, Electronic design automation, Hardware Architecture, nVidia, nVidia GeForce GTX 280, Performance

May 31, 2011 by hgpu

Analyzing throughput of GPGPUs exploiting within-die core-to-core frequency variation

Jungseob Lee, Paritosh Pratap Ajgaonkar, Nam Sung Kim

Tags: Computer science, Hardware Architecture, Performance

May 21, 2011 by hgpu

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

SimSYCL: A SYCL Implementation Targeting Development, Debugging, Simulation and Conformance

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

gpu_tracker: Python package for tracking and profiling GPU utilization in both desktop and high-performance computing environments

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

94% on CIFAR-10 in 3.29 Seconds on a Single GPU

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

LOOPer: A Learned Automatic Code Optimizer For Polyhedral Compilers

OpenMC Monte Carlo Code

Performance Portable Monte Carlo Particle Transport on Intel, NVIDIA, and AMD GPUs

Polygeist: C/C++ frontend for MLIR

Retargeting and Respecializing GPU Workloads for Performance Portability

Parallel Gaussian process with kernel approximation in CUDA

See all packages

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high performance computing on graphics processing units: hgpu.org

The GeForce 6800

Introducing Energy Efficiency into Graphics Processors

Energy-saving techniques for low-power graphics processing unit

An Embedded Stream Processor Core Based on Logarithmic Arithmetic for a Low-Power 3-D Graphics SoC

A comparative benchmarking of the FFT on Fermi and Evergreen GPUs

Design and implementation of a time-division multiplexing scan architecture using serializer and deserializer in GPU chips

Design of a fully programmable shader processor for low power mobile devices

A low-power integrated x86-64 and graphics processor for mobile computing devices

Xbox 360 System Architecture

A GPU/CUDA implementation of the collection-diffusion model to compute SER of large area and complex circuits

Distributed time, conservative parallel logic simulation on GPUs

Analyzing throughput of GPGPUs exploiting within-die core-to-core frequency variation

Recent source codes

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

GPU plugin for PySCF

QArray

Celerity: High-level C++ for Accelerator Clusters

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

OpenMC Monte Carlo Code

Polygeist: C/C++ frontend for MLIR

Parallel Gaussian process with kernel approximation in CUDA

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